Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
07/1998
07/01/1998EP0851580A1 Tuner for cable modem
07/01/1998EP0851555A2 Integrated circuit with improved overvoltage protection
07/01/1998EP0702859B1 Btl compatible cmos line driver
07/01/1998EP0700599B1 Cmos input with v cc? compensated dynamic threshold
07/01/1998CN1186383A 信号监控电路 Signal monitoring circuit
07/01/1998CN1186382A Reflective code generator and method therefor
07/01/1998CN1186332A Semiconductor wafer serving as master-slice with built-in additional current drivers for semi-custom-made integrated circuit device
07/01/1998CN1186280A Method of laying out interconnections
06/1998
06/30/1998US5774367 Computer implemented method
06/30/1998US5774015 Compact semiconductor integrated circuit capable of reducing electromagnetic emission
06/30/1998US5774014 Integrated buffer circuit which functions independently of fluctuations on the supply voltage
06/30/1998US5774012 Charge-pumping circuit for semiconductor memory device
06/30/1998US5773999 Output buffer for memory circuit
06/30/1998US5773996 Multiple-valued logic circuit
06/30/1998US5773994 Method and apparatus for implementing an internal tri-state bus within a programmable logic circuit
06/30/1998US5773993 Configurable electronic device which is compatible with a configuration bitstream of a prior generation configurable electronic device
06/30/1998US5773992 Output buffer circuit capable of supressing ringing
06/30/1998US5773856 Structure for connecting to integrated circuitry
06/30/1998CA2224767A1 Variable cmos vernier delay
06/30/1998CA2051103C High speed complementary field effect transistor logic circuits
06/25/1998DE19738346A1 Signalüberwachungsschaltung Signal monitoring circuit
06/24/1998EP0849663A2 Conditional sum adder using pass-transistor logic
06/24/1998EP0848868A1 Resonant driver circuit with reduced power consumption
06/24/1998EP0705529A4 Method and apparatus for non-conductively interconnecting integrated circuits
06/23/1998US5771389 Low slew rate output buffer with staged biasing voltage
06/23/1998US5771140 Electro-static discharge and latch-up prevention circuit
06/23/1998US5770978 Current type ring oscillator, and voltage-controlled oscillator having current type ring oscillator
06/23/1998US5770963 Flash memory with improved erasability and its circuitry
06/23/1998US5770960 Process tolerant delay circuit
06/23/1998US5770958 Periodic waveform generating circuit
06/23/1998US5770951 Method for accessing data in a logic device
06/18/1998WO1998026356A1 Unit for processing numeric and logical operations, for use in processors (cpus) and in multicomputer systems
06/18/1998WO1998026354A1 Balanced differential current mode driver
06/18/1998DE19710488A1 Input-output 5V resistant switching circuit for semiconductor chip esp. for audio processors
06/18/1998CA2274532A1 Unit for processing numeric and logical operations, for use in processors (cpus) and in multicomputer systems
06/17/1998EP0848500A1 Parallel-serial converter
06/17/1998EP0848498A1 Output driver circuit in semiconductor device
06/17/1998EP0847625A2 Logic circuits
06/17/1998EP0847624A1 Multiple logic family compatible output driver
06/17/1998EP0847623A1 Output buffer incorporating shared intermediate nodes
06/17/1998EP0707721A4 Programmable logic device with regional and universal signal routing
06/17/1998CN1185058A 时钟驱动器 Clock Driver
06/16/1998US5768372 Method and apparatus for securing programming data of a programmable logic device
06/16/1998US5767732 Circuit for permanently adjusting a circuit element value in a semiconductor integrated circuit using fuse elements
06/16/1998US5767728 Noise tolerant CMOS inverter circuit having a resistive bias
06/16/1998US5767703 Differential bus drivers
06/16/1998US5767702 Switched pull down emitter coupled logic circuits
06/16/1998US5767700 Pulse signal transfer unit employing post charge logic
06/16/1998US5767698 High speed differential output driver with common reference
06/16/1998US5767697 Low-voltage output circuit for semiconductor device
06/16/1998US5767696 Tri-state devices having exclusive gate output control
06/16/1998US5767562 Dielectrically isolated power IC
06/11/1998WO1998025344A1 An or-type memorizing integrated circuit
06/10/1998EP0846997A2 Integrated circuit actively biasing the threshold voltage of transistors and related methods
06/10/1998EP0846956A2 Scan path circuit with holding means
06/10/1998EP0846372A1 Cmos buffer circuit having increased speed
06/10/1998EP0846371A1 Cmos buffer circuit having power-down feature
06/10/1998EP0846370A2 Circuit for partially reprogramming an operational programmable logic device
06/10/1998EP0846289A1 Field programmable gate array with distributed ram and increased cell utilization
06/10/1998DE19651075A1 Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen Unit for processing numerical and logical operations used in processors (CPUs), multiple computer systems, dataflow (DFP's), digital signal processors (DSP's) or the like
06/10/1998CN1184380A Integrated circuit OR recording technology
06/09/1998US5764647 Data link module for time division multiplexing control systems
06/09/1998US5764583 In a two-dimensional array
06/09/1998US5764528 Delay optimizing method in logic circuit designing
06/09/1998US5764468 Circuit comprising a bus conductor and a bus interface circuit
06/09/1998US5764096 General purpose, non-volatile reprogrammable switch
06/09/1998US5764085 Circuit for dumping a computer instruction to one of a plurality of buses
06/09/1998US5764084 In an integrated circuit
06/09/1998US5764082 Circuits, systems and methods for transferring data across a conductive line
06/09/1998US5764081 Null convention interface circuits
06/09/1998US5764080 Input/output interface circuitry for programmable logic array integrated circuit devices
06/09/1998US5764079 Sample and load scheme for observability of internal nodes in a PLD
06/09/1998US5764078 Family of multiple segmented programmable logic blocks interconnected by a high speed centralized switch matrix
06/09/1998US5764077 5 volt tolerant I/O buffer circuit
06/09/1998US5764076 Circuit for partially reprogramming an operational programmable logic device
06/09/1998US5764075 Input circuit for mode setting
06/09/1998US5764074 System for, and method of, minimizing noise in an integrated circuit chip
06/04/1998WO1998024184A1 Adjustable output driver circuit
06/04/1998DE19751789A1 Voltage level shifting circuit
06/04/1998DE19732114A1 Clock driver circuitry with internal circuits in main plane of semiconductor substrate for gate array or embedded cell array
06/04/1998DE19727796A1 Differential amplifier with two source follower input circuits
06/03/1998EP0845864A2 Level converter and semiconductor device
06/03/1998CN1183677A 5V tolerant input/output circuit
06/02/1998US5761483 Optimizing and operating a time multiplexed programmable logic device
06/02/1998US5761244 Adapted for digital signals
06/02/1998US5761107 Method and apparatus for improving the speed of a logic circuit
06/02/1998US5761099 Configurable electronic device
06/02/1998US5761077 Graph partitioning engine based on programmable gate arrays
06/02/1998US5760719 Programmable I/O cell with data conversion capability
06/02/1998US5760634 High speed, low noise output buffer
06/02/1998US5760633 Low power low noise circuit design using half Vdd
06/02/1998US5760631 Protection circuit for a CMOS integrated circuit
06/02/1998US5760621 Method for operating a charge conserving driver circuit for capacitive loads
06/02/1998US5760618 Process compensated integrated circuit output driver
06/02/1998US5760611 Function generator for programmable gate array
06/02/1998US5760610 Qualified universal clock buffer circuit for generating high gain, low skew local clock signals
06/02/1998US5760609 Clock signal providing circuit with enable and a pulse generator with enable for use in a block clock circuit of a programmable logic device
06/02/1998US5760607 System comprising field programmable gate array and intelligent memory
06/02/1998US5760604 Interconnect architecture for field programmable gate array
06/02/1998US5760603 High speed PLD "AND" array with separate nonvolatile memory
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