H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits

Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
11/1998
11/03/1998	US5831450 System for improved response time output buffer unit having individual stages for signal generation and buffering and output stage applying signal determined by input signal
11/03/1998	US5831449 Output circuit for use in a semiconductor integrated circuit
11/03/1998	US5831448 Function unit for fine-gained FPGA
11/03/1998	US5831447 Output buffer with noisy/quiet voltage sources and feedback patch for noise reduction
11/03/1998	US5831278 Three-terminal devices with wide Josephson junctions and asymmetric control lines
10/1998
10/28/1998	EP0874462A1 Pull-up circuit and semiconductor device using the same
10/28/1998	EP0818080A4 Output characteristics stabilization of cmos devices
10/28/1998	CN1197331A Output buffer circuit having low breakdown voltage
10/27/1998	US5828869 Microprocessor arranged for synchronously accessing an external memory with a scalable clocking mechanism
10/27/1998	US5828538 Power-up circuit for field programmable gate arrays
10/27/1998	US5828260 Output buffer circuit
10/27/1998	US5828241 Signal transmission circuit providing amplified output from positive feedback of intermediate amplifier circuit
10/27/1998	US5828237 Emitter coupled logic (ECL) gate and method of forming same
10/27/1998	US5828236 Selectable inverter circuit
10/27/1998	US5828235 Semiconductor integrated circuit device having power reduction mechanism
10/27/1998	US5828234 Pulsed reset single phase domino logic
10/27/1998	US5828233 Receiver circuit
10/27/1998	US5828231 High voltage tolerant input/output circuit
10/27/1998	US5828230 FPGA two turn routing structure with lane changing and minimum diffusion area
10/27/1998	US5828229 Programmable logic array integrated circuits
10/27/1998	US5828228 Null convention logic system
10/22/1998	WO1998047230A1 Input/output buffer supporting multiple i/o standards
10/22/1998	WO1998047229A1 Self-configuring 1.8 and 3.0 volt interface architecture on flash memories
10/22/1998	WO1998047180A1 Semiconductor integrated circuit
10/22/1998	WO1998035294A3 Internal bus system for dfps, building blocks with two dimensional or multidimensional programmable cell structures to handle large amounts of data involving high networking requirements
10/21/1998	EP0872958A2 MOS logic circuit and semiconductor apparatus including the same
10/21/1998	CN1196609A High-voltage tolerant input buffer in low-voltage technology
10/20/1998	US5826004 Input/output device with self-test capability in an integrated circuit
10/20/1998	US5825819 Asymmetrical digital subscriber line (ADSL) line driver circuit
10/20/1998	US5825695 Semiconductor device for reference voltage
10/20/1998	US5825221 Output circuit of semiconductor device
10/20/1998	US5825219 Fast edge rate signal driver
10/20/1998	US5825217 Low power accelerated switching for MOS circuits
10/20/1998	US5825215 Output buffer circuit
10/20/1998	US5825208 Method and apparatus for fast evaluation of dynamic CMOS logic circuits
10/20/1998	US5825207 Output buffer circuit
10/20/1998	US5825206 Input/output buffer for computer circuitry
10/20/1998	US5825205 Level-shift circuit for driving word lines of negative gate erasable type flash memory
10/20/1998	US5825203 Variable logic integrated circuit device having connections through switch matrix and top layers for inter-cell connections
10/20/1998	US5825202 Integrated circuit with field programmable and application specific logic areas
10/20/1998	US5825201 Programming architecture for a programmable integrated circuit employing antifuses
10/20/1998	US5825200 Programming architecture for a programmable integrated circuit employing antifuses
10/20/1998	US5825199 Reprogrammable state machine and method therefor
10/20/1998	US5825198 Semiconductor integrated circuits with power reduction mechanism
10/20/1998	US5825197 Means and apparatus to minimize the effects of silicon processing defects in programmable logic devices
10/15/1998	WO1998045948A1 Qmos digital logic circuits
10/15/1998	WO1998045947A1 Configurable logic element for fpga
10/15/1998	DE19815878A1 Signal transmission method for semiconductor circuits
10/15/1998	DE19715455A1 Differential driver circuit for computer system universal bus
10/14/1998	EP0871296A2 Multiplexor composed of dynamic latches
10/14/1998	EP0871292A1 In-system programmable interconnect circuit
10/14/1998	EP0871291A1 Precision amplifier for pulse signals
10/14/1998	EP0695477A4 Sequentially clocked domino-logic cells
10/14/1998	CN1196142A Universal sender device
10/14/1998	CN1195860A Data-outputting buffer circuit
10/13/1998	US5822596 Controlling power up using clock gating
10/13/1998	US5822497 Data sorting circuit
10/13/1998	US5822267 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions
10/13/1998	US5822235 Rectifying transfer gate circuit
10/13/1998	US5822214 CAD for hexagonal architecture
10/13/1998	US5821809 CMOS high-speed differential to single-ended converter circuit
10/13/1998	US5821800 High-voltage CMOS level shifter
10/13/1998	US5821799 Low voltage level shifting circuit and low voltage sense amplifier
10/13/1998	US5821796 Circuitry for providing a high impedance state when powering down a single port node
10/13/1998	US5821794 Clock distribution architecture and method for high speed CPLDs
10/13/1998	US5821785 Clock signal frequency multiplier
10/13/1998	US5821783 Buffer circuits with changeable drive characteristic
10/13/1998	US5821778 Logic circuit
10/13/1998	US5821776 Field programmable gate array with mask programmed analog function circuits
10/13/1998	US5821775 Method and apparatus to interface monotonic and non-monotonic domino logic
10/13/1998	US5821774 Structure and method for arithmetic function implementation in an EPLD having high speed product term allocation structure
10/13/1998	US5821773 For a programmable logic device
10/13/1998	US5821772 Programmable address decoder for programmable logic device
10/13/1998	US5821771 Method and apparatus for monitoring or forcing an internal node in a programmable device
10/13/1998	US5821770 Option decoding with on-chip electrical fuses
10/13/1998	US5821769 Low voltage CMOS logic circuit with threshold voltage control
10/13/1998	US5821768 Receiver circuit with constant input impedance
10/13/1998	US5821767 Information processing apparatus and backboard having on backboard side matching resistors suited to modules connected thereto
10/11/1998	CA2235047A1 A dynamic current mode logic family
10/08/1998	DE19739072A1 Booster circuit for driving supply voltage using condenser unit, E.G for DRAM
10/07/1998	EP0869617A1 Pad input select circuit for use with bond options
10/07/1998	EP0869616A2 Output circuit, input circuit and input/output circuit
10/07/1998	EP0869615A1 Input amplifier having current cut-off from the supply rail or to the ground for input signals having steep edges
10/07/1998	EP0869614A1 Input amplifier for input signals with steep edges
10/07/1998	CN1195225A In one side cut-off current input amplifier for input signal with sharp edge
10/07/1998	CN1195196A 半导体集成电路装置 The semiconductor integrated circuit device
10/06/1998	US5819099 Voltage converting I/O driver circuit
10/06/1998	US5818730 FPGA one turn routing structure and method using minimum diffusion area
10/06/1998	US5818380 Analog-digital converter capable of reducing a conversation error of an output signal
10/06/1998	US5818373 Interface between superconductor and semiconductor electronic circuits using phase-shift keying coded output data format
10/06/1998	US5818280 Method and apparatus with preconditioning for shifting the voltage level of a signal
10/06/1998	US5818278 Level shift circuit
10/06/1998	US5818273 Configurable multifunction flip-flop
10/06/1998	US5818266 Data transmission circuit for a semiconductor memory device
10/06/1998	US5818264 Dynamic circuit having improved noise immunity and method therefor
10/06/1998	US5818263 Method and apparatus for locating and improving race conditions in VLSI integrated circuits
10/06/1998	US5818262 High speed CMOS output buffer using 3 volt or lower supply voltage supplied on a plurality of bond pads
10/06/1998	US5818261 Pseudo differential bus driver/receiver for field programmable devices
10/06/1998	US5818260 Transmission line driver having controllable rise and fall times with variable output low and minimal on/off delay
10/06/1998	US5818259 Low voltage logic circuit

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