Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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12/08/1998 | US5847578 Programmable multiplexing input/output port |
12/08/1998 | US5847577 DRAM memory cell for programmable logic devices |
12/08/1998 | US5847576 Low power, variable logic threshold voltage, logic gates |
12/08/1998 | US5847575 Method and apparatus for performing switched supply drive in CMOS pad drivers |
12/03/1998 | WO1998054839A1 Input circuit for an integrated circuit |
12/03/1998 | DE19819867A1 Digital gate circuit with reduced transverse current |
12/03/1998 | DE19757959A1 Integrated semiconducting circuit for signal processing |
12/02/1998 | EP0881771A1 A BiCMOS Logic Gate |
12/02/1998 | CN1200572A Semiconductor integrated circuit device operating stably at plurality of power supply voltage levels |
12/02/1998 | CN1200547A Charge pump circuit and logic circuit |
12/01/1998 | USRE35977 Look up table implementation of fast carry arithmetic and exclusive-or operations |
12/01/1998 | US5844913 Current mode interface circuitry for an IC test device |
12/01/1998 | US5844854 Programmable logic device with two dimensional memory addressing |
12/01/1998 | US5844846 Data output buffer for memory device |
12/01/1998 | US5844829 Configurable parallel and bit serial load apparatus |
12/01/1998 | US5844767 Level converting circuit for converting level of an input signal, internal potential generating circuit for generating internal potential, internal potential generating unit generating internal potential highly reliable semiconductor device and method of |
12/01/1998 | US5844437 Differential flipflop circuit operating with a low voltage |
12/01/1998 | US5844426 Read Channel device |
12/01/1998 | US5844425 CMOS tristate output buffer with having overvoltage protection and increased stability against bus voltage variations |
12/01/1998 | US5844424 Programmably bidirectional buffered interconnect circuit |
12/01/1998 | US5844422 State saving and restoration in reprogrammable FPGAs |
11/26/1998 | WO1998053401A1 Redundancy circuitry for programmable logic devices with interleaved input circuits |
11/26/1998 | DE19737589C1 Interface arrangement for IC with full-custom and semi-custom clock domain |
11/26/1998 | DE19730985C1 Open collector circuit arrangement |
11/25/1998 | EP0880233A1 Extended-trinary coded decimal apparatus and method |
11/25/1998 | EP0880231A1 Domino logic circuits |
11/25/1998 | EP0880230A2 Voltage-level shifter |
11/25/1998 | EP0880229A1 Logic interface circuit |
11/25/1998 | EP0830734A4 Glitch-free clock enable circuit |
11/25/1998 | CN1199955A Input amplifier for input signal with steep-side |
11/24/1998 | US5841702 Output circuit for memory device |
11/24/1998 | US5841694 High performance programmable interconnect |
11/24/1998 | US5841619 Interface circuit for use in a semiconductor integrated circuit |
11/24/1998 | US5841317 Differential amplifier circuit with a high through put rate and reduced power consumption |
11/24/1998 | US5841309 Low voltage input buffer for asymmetrical logic signals |
11/24/1998 | US5841307 Delay device and delay time measurement device using a ring oscillator |
11/24/1998 | US5841300 Semiconductor integrated circuit apparatus |
11/24/1998 | US5841299 Method and apparatus for implementing an adiabatic logic family |
11/24/1998 | US5841298 Locally asynchronous, pipeline-able logic circuits for true-single-phase synchronous logic circuit |
11/24/1998 | US5841297 Circuit arrangement for driving an MOS field-effect transistor allocated to the supply circuit of an electrical load |
11/24/1998 | US5841296 Programmable delay element |
11/24/1998 | US5841295 Hybrid programmable logic device |
11/18/1998 | EP0878054A1 Energy economized pass-transistor logic circuit and full adder using the same |
11/18/1998 | EP0829137A4 Dual feature input/timing pin |
11/17/1998 | US5838630 Integrated circuit device, semiconductor memory, and integrated circuit system coping with high-frequency clock signal |
11/17/1998 | US5838628 In a two-dimensional array |
11/17/1998 | US5838204 Phase locked loop with multiple, programmable, operating frequencies, and an efficient phase locked loop layout method |
11/17/1998 | US5838188 Reference voltage generation circuit |
11/17/1998 | US5838187 Integrated circuit thermal shutdown system utilizing a thermal sensor |
11/17/1998 | US5838186 Signal output circuit with reduced noise in output signal |
11/17/1998 | US5838183 Clock signal generator having voltage level converting circuit |
11/17/1998 | US5838170 PMOS charge-sharing prevention device for dynamic logic circuits |
11/17/1998 | US5838169 NMOS charge-sharing prevention device for dynamic logic circuits |
11/17/1998 | US5838168 3V/5V input buffer |
11/17/1998 | US5838167 Method and structure for loading data into several IC devices |
11/17/1998 | US5838166 Compact and high-speed judging circuit using misfets |
11/17/1998 | US5838165 Method of configuring an array of programmable logic cells |
11/17/1998 | US5838047 Semiconductor device |
11/17/1998 | US5838040 Nonvolatile reprogrammable interconnect cell with FN tunneling in sense |
11/12/1998 | WO1998051013A1 Method and structure for providing fast conditional sum in a field programmable gate array |
11/12/1998 | WO1998051012A1 Output buffer circuit |
11/12/1998 | WO1998050856A1 Non-intrusive power control for computer systems |
11/12/1998 | DE19820435A1 Signal transceiver for conductive path system with several logic values |
11/12/1998 | DE19752627A1 Exclusive NOR-circuit with three inputs |
11/12/1998 | DE19751269A1 Clock signal synchronising circuit |
11/12/1998 | DE19722158C1 Eingangsschaltung für eine integrierte Schaltung Input circuit for an integrated circuit |
11/12/1998 | DE19719448A1 Inverter circuit for level converter |
11/11/1998 | EP0877486A1 Pulse generation |
11/11/1998 | EP0877385A2 Non-disruptive, randomly addressable memory system |
11/10/1998 | US5836007 Methods and systems for improving memory component size and access speed including splitting bit lines and alternate pre-charge/access cycles |
11/10/1998 | US5835998 Logic cell for programmable logic devices |
11/10/1998 | US5835752 Bus interface |
11/10/1998 | US5835751 Structure and method for providing reconfigurable emulation circuit |
11/10/1998 | US5835405 Application specific modules in a programmable logic device |
11/10/1998 | US5835045 Semiconductor device, and operating device, signal converter, and signal processing system using the semiconductor device. |
11/10/1998 | US5834968 Low pass filter |
11/10/1998 | US5834962 Level shift circuit and voltage controlled oscillation circuit using the same |
11/10/1998 | US5834955 Integrated circuit with memory programmable pad driver |
11/10/1998 | US5834948 Arranged to receive an output signal from one circuit |
11/10/1998 | US5834947 Microcontroller accessible macrocell |
11/10/1998 | US5834860 Controlled impedance transistor switch circuit |
11/10/1998 | US5834859 Battery backed configurable output buffer |
11/10/1998 | US5834821 Triangular semiconductor "AND" gate device |
11/10/1998 | US5834800 Heterojunction bipolar transistor having mono crystalline SiGe intrinsic base and polycrystalline SiGe and Si extrinsic base regions |
11/10/1998 | US5834794 Superconducting device |
11/04/1998 | EP0875997A2 A BiCMOS logic gate |
11/04/1998 | EP0875996A1 Logic device |
11/04/1998 | EP0875995A1 Integrated data transmission circuit with galvanic isolation between input and output |
11/04/1998 | EP0875093A1 Output buffer switching circuit |
11/04/1998 | CN1198017A Pull-up and pull-down circuit |
11/03/1998 | US5832469 Electronic system organized as a matrix network of functional cells |
11/03/1998 | US5831908 Data output circuit, intermediate potential setting circuit, and semiconductor integrated circuit |
11/03/1998 | US5831806 Protective circuit for BiCMOS/CMOS circuitry in hybrid VCC systems during H operation |
11/03/1998 | US5831472 Integrated circuit design for single ended receiver margin tracking |
11/03/1998 | US5831470 High-efficiency charge pumping circuit |
11/03/1998 | US5831458 Output circuit having BiNMOS inverters |
11/03/1998 | US5831457 Input buffer circuit immune to common mode power supply fluctuations |
11/03/1998 | US5831454 Emitter coupled logic (ECL) gate |
11/03/1998 | US5831452 Leak tolerant low power dynamic circuits |
11/03/1998 | US5831451 Dynamic logic circuits using transistors having differing threshold voltages |