Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
05/2003
05/08/2003US20030085433 Semiconductor device and method for manufacturing the same
05/08/2003US20030085431 Trench mosfet with reduced miller capacitance
05/08/2003US20030085430 Trench mosfet with low gate charge
05/08/2003US20030085429 Triggering of an ESD NMOS through the use of an N-type buried layer
05/08/2003US20030085428 Gate feed structure for reduced size field effect transistors
05/08/2003US20030085427 Active matrix pixel device
05/08/2003US20030085426 Semiconductor device, method of forming epitaxial film, and laser ablation device
05/08/2003US20030085425 Silicon on insulator device with improved heat removal and method of manufacture
05/08/2003US20030085424 Transistor structure with thick recessed source/drain structures and fabrication process of same
05/08/2003US20030085422 Low voltage trench type power MOSFETs(Metal On Silicon Field Effect Transistors
05/08/2003US20030085421 Semiconductor device and operation method thereof
05/08/2003US20030085417 Salicided gate for virtual ground arrays
05/08/2003US20030085416 Monolithically integrated pin diode and schottky diode circuit and method of fabricating same
05/08/2003US20030085414 Stabilization in device characteristics of a bipolar transistor that is included in a semiconductor device with a CMOSFET
05/08/2003US20030085406 Providing a substrate having pixels each of which has a switching device region and a pixel region; etching the first insulating layer and the second insulating layer of pixel region to form openings; forming a conductive layer over pixel
05/08/2003US20030085404 Gate wire including a gate line, a gate pad, and a gate electrode are formed on substrate; gate insulating layer, a semiconductor layer, and an ohmic contact layer are deposited, and a photoresist layer is coated; photoresist is exposed
05/08/2003US20030085401 Crystalline silicon thin film transistor panel for oeld and method of fabricating the same
05/08/2003US20030085400 Active pixel having reduced dark current in a CMOS image sensor
05/08/2003US20030085398 Organic semiconductor device
05/08/2003CA2457399A1 Sic bipolar semiconductor devices with few crystal defects
05/07/2003EP1309012A2 Integrated Schottky barrier diode and manufacturing method thereof
05/07/2003EP1309011A2 Semiconductor component and method of operation
05/07/2003EP1309010A2 3-5 group compound semiconductor and semiconductor device
05/07/2003EP1309007A2 Active pixel having reduced dark current in a cmos image sensor
05/07/2003EP1309006A2 Integrated circuit with closely coupled high-voltage output and offline transistor pair.
05/07/2003EP1308999A2 Method and apparatus for separating a member
05/07/2003EP1308995A2 Semiconductor Device Having A Dielectric Layer With A Uniform Nitrogen Profile
05/07/2003EP1308993A2 High-K gate oxides with buffer layers of titanium for mfos single transistor memory applications
05/07/2003EP1308959A2 Ferroelectric semiconductor memory
05/07/2003EP1307924A1 Electrically tunable device and a method relating thereto
05/07/2003EP1307923A1 High-voltage diode and method for the production thereof
05/07/2003EP1307922A2 A novel capacitively coupled dtmos on soi
05/07/2003EP1307921A2 Capacitively coupled dtmos on soi for multiple devices
05/07/2003EP1307920A2 Memory cell, memory cell device and method for the production thereof
05/07/2003EP1307917A2 Gate technology for strained surface channel and strained buried channel mosfet devices
05/07/2003EP1307912A2 Automated determination and display of the physical location of a failed cell in an array of memory cells
05/07/2003EP1307904A2 Methods for reducing the curvature in boron-doped silicon micromachined structures
05/07/2003EP1307750A1 Micromechanical component
05/07/2003EP0963586B1 A scalable flash eeprom memory cell, method of manufacturing and operation thereof
05/07/2003EP0786819B1 Process for preparing thin-film transistor, process for preparing active matrix substrate, and liquid crystal display
05/07/2003EP0728367B1 A flash eprom transistor array and method for manufacturing the same
05/07/2003CN1416607A Quantum well intermixing
05/07/2003CN1416597A Trench gate DMOS field-offect transistor
05/07/2003CN1416596A Method of mfg. active matrix substrate
05/07/2003CN1416592A Single tunnel gate oxidation process for fabricating NAND flash memory
05/07/2003CN1416591A 半导体结构 Semiconductor structure
05/07/2003CN1416590A 半导体结构 Semiconductor structure
05/07/2003CN1416589A Quantum well intermixing
05/07/2003CN1416178A 半导体器件 Semiconductor devices
05/07/2003CN1416175A Memory array self aligning method of forming floating grid memory unit and memory array
05/07/2003CN1416166A Method of mfg. integrated circuit with shallow junction
05/07/2003CN1416159A Epitaxial silicon mutually compensated metal oxide semiconductor on silicon germanium/insulator and its mfg. method
05/07/2003CN1416155A Mothod of forming resistance electrode
05/07/2003CN1415479A Constructional body with through hole, its mfg. method and liquid discharge head
05/07/2003CN1107976C Process for fabricating semiconductor device without separation between silicide layer and insulating layer
05/06/2003US6560729 Automated determination and display of the physical location of a failed cell in an array of memory cells
05/06/2003US6559913 Liquid crystal display device having light-shielding film and data line of equal width and manufacturing method thereof
05/06/2003US6559906 Liquid crystal display device having gate electrode with two conducting layers, one used for self-aligned formation of the TFT semiconductor regions
05/06/2003US6559905 Active matrix substrate and method of manufacturing the same
05/06/2003US6559700 Semiconductor integrated circuit
05/06/2003US6559683 Resurf EDMOS transistor and high-voltage analog multiplexer circuit using the same
05/06/2003US6559672 Characteristic evaluation apparatus for insulated gate type transistors
05/06/2003US6559661 Circuit configuration for compensating the temperature non-linearity of the characteristic curves of the piezoresistive measuring resistors connected in a bridge circuit
05/06/2003US6559595 Active matrix liquid crystal display device and its manufacturing method
05/06/2003US6559594 Light-emitting device
05/06/2003US6559534 Thermal capacity for electronic component operating in long pulses
05/06/2003US6559518 MOS heterostructure, semiconductor device with the structure, and method for fabricating the semiconductor device
05/06/2003US6559517 Structure for a semiconductor device
05/06/2003US6559515 Insulating wall between power components
05/06/2003US6559513 Field-plate MESFET
05/06/2003US6559507 Compact ballasting region design for snapback N-MOS ESD protection structure using multiple local N+ region blocking
05/06/2003US6559506 Imaging array and methods for fabricating same
05/06/2003US6559504 Lateral double diffused MOS transistor
05/06/2003US6559503 Transistor with ESD protection
05/06/2003US6559502 Semiconductor device
05/06/2003US6559500 Non-volatile semiconductor memory and its driving method
05/06/2003US6559491 Folded bit line DRAM with ultra thin body transistors
05/06/2003US6559490 Method of processing dielectric layer in ferroelectric RAM and structure of the like
05/06/2003US6559488 Integrated photodetector
05/06/2003US6559487 Signal processing circuitry connected with flip chip; detecting inertial angular velocity
05/06/2003US6559485 Semiconductor device having a gate insulation film resistant to dielectric breakdown
05/06/2003US6559482 III-N compound semiconductor bipolar transistor structure and method of manufacture
05/06/2003US6559481 Semiconductor device for precise measurement of a forward voltage effect
05/06/2003US6559479 Thin-film solar array system and method for producing the same
05/06/2003US6559478 Semiconductor integrated circuit and method of fabricating same
05/06/2003US6559472 Film composition
05/06/2003US6559470 Negative differential resistance field effect transistor (NDR-FET) and circuits using the same
05/06/2003US6559468 Molecular wire transistor (MWT)
05/06/2003US6559449 Planar X-ray detector
05/06/2003US6559433 Display type image sensor
05/06/2003US6559390 Solder connect assembly and method of connecting a semiconductor package and a printed wiring board
05/06/2003US6559068 Method for improving inversion layer mobility in a silicon carbide metal-oxide semiconductor field-effect transistor
05/06/2003US6559051 Electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors
05/06/2003US6559041 Semiconductor device and method for manufacturing same
05/06/2003US6559037 Process for producing semiconductor device having crystallized film formed from deposited amorphous film
05/06/2003US6559036 Semiconductor device and method of manufacturing the same
05/06/2003US6559034 Method of fabricating semiconductor device
05/06/2003US6559024 Method of fabricating a variable capacity diode having a hyperabrupt junction profile
05/06/2003US6559021 Method of producing a Si-Ge base heterojunction bipolar device
05/06/2003US6559020 Bipolar device with silicon germanium (SiGe) base region
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