Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
05/2003
05/21/2003EP1313134A1 Semiconductor polysilicon component and method of manufacture thereof
05/21/2003EP1312697A1 CVD of dielectric films
05/21/2003EP1312123A1 Metal sulfide semiconductor transistor devices
05/21/2003EP1312122A2 Integrated transistor devices
05/21/2003EP1312121A2 Power mosfet and methods of forming and operating the same
05/21/2003EP1312120A1 Dense arrays and charge storage devices, and methods for making same
05/21/2003EP1312119A2 Non-volatile memory, method of manufacture and programming
05/21/2003EP1312110A2 Method and device to reduce gate-induced drain leakage (gidl) current in thin gate oxide mosfets
05/21/2003EP1312105A1 Directed assembly of nanometer-scale molecular devices
05/21/2003EP1311838A1 Nanostructure-based high energy capacity material
05/21/2003EP1311818A1 Sensor usable in ultra pure and highly corrosive environments
05/21/2003EP1230340A4 Methods and apparatus for the electronic, homogeneous assembly and fabrication of devices
05/21/2003EP1135805A4 Insulated channel field effect transistor with an electric field terminal region
05/21/2003EP0970525B1 Asymmetrical thyristor
05/21/2003EP0795202B1 Method of manufacturing a multilayer solar cell
05/21/2003CN1419713A Group III nitride based fets and hemts with reduced trapping and method for producing the same
05/21/2003CN1419712A Semiconductor device and method of manufacture thereof
05/21/2003CN1419710A Method for forming high quality multiple thickness oxide layers by reducing descum induced defects
05/21/2003CN1419340A Terminal circuit without influence by voltage
05/21/2003CN1419298A Asymmetric high voltage MOS element
05/21/2003CN1419157A Lcd
05/21/2003CN1109363C Semiconductor device and method of manufacturing same
05/21/2003CN1109360C Fabrication method of semiconductor device with CMOS structure
05/21/2003CN1109358C Method for fabricating DMOS transistor
05/21/2003CN1109354C Method of producing thin film transistor
05/20/2003US6567312 Non-volatile semiconductor memory device having a charge storing insulation film and data holding method therefor
05/20/2003US6567219 Laser irradiation apparatus
05/20/2003US6567046 Reconfigurable antenna
05/20/2003US6566761 Electronic device package with high speed signal interconnect between die pad and external substrate pad
05/20/2003US6566754 Polycrystalline semiconductor device and its manufacture method
05/20/2003US6566753 Composite iridium barrier structure with oxidized refractory metal companion barrier
05/20/2003US6566744 Integrated circuit packages assembled utilizing fluidic self-assembly
05/20/2003US6566734 Semiconductor device
05/20/2003US6566733 Method and system for providing a power lateral PNP transistor using a buried power buss
05/20/2003US6566726 Semiconductor device and power converter using the same
05/20/2003US6566721 High-accuracy bleeder resistance circuit that can maintain an initial resistance value even after being packaged and can maintain an accurate voltage division ratio.
05/20/2003US6566714 Electronic device including a thin film transistor
05/20/2003US6566713 Semiconductor device and manufacturing method thereof
05/20/2003US6566712 SOI structure semiconductor device and a fabrication method thereof
05/20/2003US6566711 Semiconductor device having interlayer insulating film
05/20/2003US6566710 Power MOSFET cell with a crossed bar shaped body contact area
05/20/2003US6566709 Semiconductor device
05/20/2003US6566708 Trench-gate field-effect transistors with low gate-drain capacitance and their manufacture
05/20/2003US6566707 Transistor, semiconductor memory and method of fabricating the same
05/20/2003US6566705 Enhanced EPROM structures with accentuated hot electron generation regions
05/20/2003US6566704 Vertical nano-size transistor using carbon nanotubes and manufacturing method thereof
05/20/2003US6566699 Non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
05/20/2003US6566697 Pinned photodiode five transistor pixel
05/20/2003US6566696 Self-aligned VT implant
05/20/2003US6566695 Hyperbolic type channel MOSFET
05/20/2003US6566694 Heterojunction bipolar transferred electron tetrode
05/20/2003US6566693 Reduced capacitance scaled HBT using a separate base post layer
05/20/2003US6566691 Semiconductor device with trench gate having structure to promote conductivity modulation
05/20/2003US6566690 Single feature size MOS technology power device
05/20/2003US6566687 Metal induced self-aligned crystallization of Si layer for TFT
05/20/2003US6566686 Thin-film transistor display devices
05/20/2003US6566684 Active matrix circuit having a TFT with pixel electrode as auxiliary capacitor
05/20/2003US6566682 Programmable memory address and decode circuits with ultra thin vertical body transistors
05/20/2003US6566680 Semiconductor-on-insulator (SOI) tunneling junction transistor
05/20/2003US6566678 Semiconductor device having a solid-state image sensor
05/20/2003US6566284 Method of manufacture for 80 nanometer diameter resonant tunneling diode with improved peak-to-valley ratio and resonant tunneling diode therefrom
05/20/2003US6566257 Method for producing semiconductor device
05/20/2003US6566254 Method for forming a silicide film on gate electrodes and diffusion layers of MOS transistors
05/20/2003US6566216 Method of manufacturing a trench transistor
05/20/2003US6566215 Method of fabricating short channel MOS transistors with source/drain extensions
05/20/2003US6566213 Method of fabricating multi-thickness silicide device formed by disposable spacers
05/20/2003US6566211 Surface modified interconnects
05/20/2003US6566210 Method of improving gate activation by employing atomic oxygen enhanced oxidation
05/20/2003US6566209 Method to form shallow junction transistors while eliminating shorts due to junction spiking
05/20/2003US6566208 Method to form elevated source/drain using poly spacer
05/20/2003US6566205 Method to neutralize fixed charges in high K dielectric
05/20/2003US6566204 Use of mask shadowing and angled implantation in fabricating asymmetrical field-effect transistors
05/20/2003US6566203 Method for preventing electron secondary injection in a pocket implantation process
05/20/2003US6566201 Method for fabricating a high voltage power MOSFET having a voltage sustaining region that includes doped columns formed by rapid diffusion
05/20/2003US6566199 Method and system for forming film, semiconductor device and fabrication method thereof
05/20/2003US6566198 CMOS structure with non-epitaxial raised source/drain and self-aligned gate and method of manufacture
05/20/2003US6566197 Method for fabricating connection structure between segment transistor and memory cell region of flash memory device
05/20/2003US6566196 Sidewall protection in fabrication of integrated circuits
05/20/2003US6566195 Method and structure for an improved floating gate memory cell
05/20/2003US6566194 Salicided gate for virtual ground arrays
05/20/2003US6566191 Forming electronic structures having dual dielectric thicknesses and the structure so formed
05/20/2003US6566189 Forming a nitride film on a semiconductor substrate; forming an amorphous Tantalum oxynitride thin film over the nitride film, crystallizing the amorphous tantalum oxynitride thin film and forming gate electrode over tantalum oxynitride film
05/20/2003US6566185 Method of manufacturing a plural unit high frequency transistor
05/20/2003US6566183 Method of making a transistor, in particular spacers of the transistor
05/20/2003US6566180 Thin film transistor and fabrication method thereof
05/20/2003US6566179 Method of manufacturing a transistor
05/20/2003US6566178 Transistor and associated driving device
05/20/2003US6566176 SOI device with wrap-around contact to underside of body, and method of making
05/20/2003US6566174 Thin-film transistor elements and methods of making same
05/20/2003US6566173 Polycrystalline silicon thin film transistor and manufacturing method thereof
05/20/2003US6566172 Method for manufacture of fully self-aligned tri-layer a-Si:H thin film transistors
05/20/2003US6566160 Method of forming a color filter
05/20/2003US6566154 Method for manufacturing liquid crystal display device
05/20/2003US6566148 Method of making a ferroelectric memory transistor
05/20/2003US6565765 Method for manufacturing a sensor having a membrane
05/20/2003US6564643 Capacitive pressure sensor
05/20/2003CA2199515C Automated molecular biological diagnostic system
05/15/2003WO2003041236A1 Surge protecting semiconductor device
05/15/2003WO2003041186A2 Organic thin film transistor with siloxane polymer interface
05/15/2003WO2003041185A2 Organic thin film transistor with polymeric interface