Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
05/2003
05/27/2003US6569717 Semiconductor device production method, electro-optical device production method, semiconductor device, and electro-optical device
05/27/2003US6569716 Method of manufacturing a polycrystalline silicon film and thin film transistor using lamp and laser anneal
05/27/2003US6569715 Large grain single crystal vertical thin film polysilicon mosfets
05/27/2003US6569699 Two layer mirror for LCD-on-silicon products and method of fabrication thereof
05/27/2003US6569693 Method for fabricating epitaxial substrate
05/27/2003US6569382 Electroosmotic movement and attachment of microscale and nanoscale devices
05/27/2003US6568269 Thin polyimide membrane and silicon nitride membranes provided respectively on a pair of main surfaces
05/27/2003US6568267 Sensing device and sensor apparatus
05/22/2003WO2003043094A1 Contact portion of semiconductor device, and thin film transistor array panel for display device including the contact portion
05/22/2003WO2003043093A1 A mask for crystallizing polysilicon and a method for forming thin film transistor using the mask
05/22/2003WO2003043092A2 Ohmic contact structure and method for the production of the same
05/22/2003WO2003043091A1 Trench-gate semiconductor devices and the manufacture thereof
05/22/2003WO2003043090A1 Monomolecular electronic device
05/22/2003WO2003043089A1 A field effect transistor semiconductor device
05/22/2003WO2003043086A2 Method for detecting currents in a semiconductor component with a multi-cell current sensor
05/22/2003WO2003043080A1 Lateral pnp transistor device, integrated circuit, and fabrication process thereof
05/22/2003WO2003043079A1 Semiconductor process and pmos varactor
05/22/2003WO2003043044A1 Mems device having a trilayered beam and related methods
05/22/2003WO2003043042A1 Mems device having electrothermal actuation and release and method for fabricating
05/22/2003WO2003043038A2 Mems device having contact and standoff bumps and related methods
05/22/2003WO2003042721A2 Trilayered beam mems device and related methods
05/22/2003WO2003007396A3 Lamellar polymer architecture
05/22/2003WO2002065507A3 Dynamic memory based on single electron storage
05/22/2003WO2002059968B1 Integrated circuits protected against reverse engineering using an apparent metal contact line terminating on field oxide and method
05/22/2003US20030097609 Flash EEprom system
05/22/2003US20030096501 For MIS (metal insulator semiconductor) transistor of which gate length, the width of the gate electrode is less than 0.1 mu m; gate insulating film is made of a high dielectric constant material
05/22/2003US20030096491 Method for fabricating a semiconductor device having a metallic silicide layer
05/22/2003US20030096490 Amorphizing semiconductor material with silicon to particluar depth, doping, then annealing at temperature consistent with solid phase epitaxy regrowth, activating the junction
05/22/2003US20030096489 Processing amorphous silicon with excimer laser pulsation, and translating positioning of sample with respect to slit patterned beamlets
05/22/2003US20030096485 Fabricating a DMOS transistor
05/22/2003US20030096484 Method of fabricating MOS transistor having shallow source/drain junction regions
05/22/2003US20030096482 Dense trench MOSFET with decreased etch sensitivity to deposition and etch processing
05/22/2003US20030096481 Metal-oxide field effect transistor (MOSFET) comprising dielectric layer and implanted electroconductive dopants
05/22/2003US20030096480 Method for forming trench MOSFET device with low parasitic resistance
05/22/2003US20030096479 Method of forming narrow trenches in semiconductor substrates
05/22/2003US20030096478 Lateral bipolar transistor and method for producing the same
05/22/2003US20030096476 Protective layer in memory device and method therefor
05/22/2003US20030096475 Protective layer in memory device and method therefor
05/22/2003US20030096470 Resolving etching defects to give predetermined properties and stability by removing a surface oxidized layer formed on the emitter layer; forming a region in which a collector electrode is disposed for wet etching other layers
05/22/2003US20030096467 Semiconductors having a high K dielectric as a hafnium oxide gate with excellent leakage current and low interface state with a gate electrode and silicon substrate; a gate dielectric on a trench ; a gate line on the gate dielectric
05/22/2003US20030096464 Method for forming a schottky diode on a silicon carbide substrate
05/22/2003US20030096463 Reduces an element area greatly by reducing source/drain areas of a transistor; increases on-current by extensively reducing distances between a gate electrode and source/drain electrodes (wiring lines); power saving; high definition
05/22/2003US20030096462 Suppress deterioration of the transistor caused by ion channeling by controlling the silicon layer so the gate insulating film side of the silicon is an amorphous layer and the surface side of is a crystalline layer; durability
05/22/2003US20030096460 Each pixel has an n-channel type thin film transistor; a channel forming region in contact with a first doped region; a second doped region of different conductivity overlapping the first; prevent increase of OFF current and decrease of ON
05/22/2003US20030096459 Crystalline silicon thin film transistor panel for LCD and method of fabricating the same
05/22/2003US20030096458 Method of manufacturing thin film transistor
05/22/2003US20030096444 Having epitaxially grown semiconductor layers; reduced crystal defects
05/22/2003US20030096441 Reduces number of steps in etching process using masks; invention relates to photosensitive cell array for detection of non-visible light ray such as an X-ray
05/22/2003US20030096098 Semiconductor with coordinatively irregular structures
05/22/2003US20030095441 Semiconductor memory having storage cells storing multiple bits and a method of driving the same
05/22/2003US20030095440 Nonvolatile semiconductor memory device
05/22/2003US20030095435 Non-volatile semiconductor memory device with a memory array preventing generation of a through current path
05/22/2003US20030095434 Semiconductor integrated circuit device
05/22/2003US20030095116 Reflective type semiconductor display device
05/22/2003US20030094969 Semiconductor device
05/22/2003US20030094857 Circuit configuration for off-load switching, switch mode power supply, clocked supply, voltage regulator, lamp switch, and methods for operating the circuit configuration
05/22/2003US20030094708 Semiconductor device and method for manufacturing it
05/22/2003US20030094698 Semiconductor device and method for fabricating the same
05/22/2003US20030094675 Semiconductor device
05/22/2003US20030094674 Semiconductor wafer
05/22/2003US20030094673 Semiconductor device and method having multiple subcollectors formed on a common wafer
05/22/2003US20030094672 Heterojunction bipolar transistor containing at least one silicon carbide layer
05/22/2003US20030094669 Semiconductor device and manufacturing method for the same
05/22/2003US20030094668 Integrated schottky barrier diode and manufacturing method thereof
05/22/2003US20030094662 MOS transistor having a T-shaped gate electrode and method for fabricating the same
05/22/2003US20030094661 Multi-threshold MIS integrated circuit device and circuit design method thereof
05/22/2003US20030094658 Thin film transistor and method of manufacturing the same
05/22/2003US20030094657 Cmos-compatible lateral dmos transistor and method for producing such a transistor
05/22/2003US20030094656 Semiconductor integrated circuit
05/22/2003US20030094653 Method and semiconductor structure for implementing reach through buried interconnect for silicon-on insulator (SOI) devices
05/22/2003US20030094651 Transistor in semiconductor devices and method of manufacturing the same
05/22/2003US20030094650 Trench-gate semiconductor devices and the manufacture thereof
05/22/2003US20030094649 Field effect transistor semiconductor device
05/22/2003US20030094647 Semiconductor memory element, semiconductor device and control method thereof
05/22/2003US20030094640 Semiconductor device and method for driving the same
05/22/2003US20030094638 Weak ferroelectric transistor
05/22/2003US20030094637 Semiconductor device, method for fabricating the semiconductor device and semiconductor integrated circuit
05/22/2003US20030094636 Both an insulating gate type transistor for high voltage and one for low voltage are formed in the same step
05/22/2003US20030094633 Field effect transistor assemblies, integrated circuitry, and methods of forming field effect transistors and integrated circuitry
05/22/2003US20030094629 Mos transistor for high density integration circuits
05/22/2003US20030094627 Semiconductor device and a method of manufacturing the same
05/22/2003US20030094625 Semiconductor device and method for fabricating the same
05/22/2003US20030094624 Trench MOSFET device with improved on-resistance
05/22/2003US20030094623 Semiconductor component and method of producing it
05/22/2003US20030094621 Semiconductor package, manufacturing method of semiconductor package
05/22/2003US20030094620 Gallium nitride-based III-V group compound semiconductor
05/22/2003US20030094619 Active matrix substrate and method of manufacturing the same
05/22/2003US20030094616 Low threshold voltage instability amorphous silicon field effect transistor structure and biasing for active matrix organic light-emitting diodes
05/22/2003US20030094615 Light emitting device
05/22/2003US20030094614 Consumes small power even when a screen is made to be larger; signal wiring line from a low resistant material and p-channel TFTs are used for a pixel TFT of a pixel portion.
05/22/2003US20030094613 Crystalline silicon thin film transistor panel for OELD and method of fabricating the same
05/22/2003US20030094611 Semiconductor device and method of fabricating the same
05/22/2003US20030094585 Pixel region and peripheral circuit region, both including thin film transistors, on amorphous substrate; semiconductor films of transistors in peripheral circuit region formed into crystalline state having streamlined flow pattern
05/22/2003US20030094047 Method of manufacturing a membrane sensor
05/22/2003CA2432486A1 Monomolecular electronic device
05/21/2003EP1313149A1 Process for fabricating a dual charge storage location memory cell
05/21/2003EP1313148A2 A scalable flash eeprom memory cell, method of manufacturing and operation thereof
05/21/2003EP1313147A2 Power MOSFET device
05/21/2003EP1313146A2 Monolithically integrated pin diode and schottky diode circuit and method of fabricating same
05/21/2003EP1313138A2 Protective layer in memory device and method therefore
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