Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/1995
07/26/1995EP0664049A1 Conveyor for magazines receiving disk-shaped objects
07/26/1995EP0664033A1 Rasterizer for a pattern generation apparatus
07/26/1995EP0656031A4 Polymeric substrate with polymeric microelements.
07/26/1995EP0526644B1 Semiconductor manufacturing equipment
07/26/1995EP0506786B1 Weakening wire supplied through a wire bonder
07/26/1995EP0388784B1 Method and apparatus for high speed integrated circuit testing
07/26/1995CN1105782A Encapsulating method for semiconductor transistor elements embedded circuit board
07/26/1995CN1105781A Integrated partial sawing process
07/26/1995CN1105780A Method for passivating III-V family semiconductor surface by using sulfur chloride
07/26/1995CN1105740A Non-adhesive ecologically-pure electroadhesion method of clamping and fixing materials
07/25/1995US5436949 Charge transfer apparatus
07/25/1995US5436912 Circuit arrangement for testing a semiconductor memory by means of parallel tests using various test bit patterns
07/25/1995US5436848 Method of and device for transporting semiconductor substrate in semiconductor processing system
07/25/1995US5436790 Wafer sensing and clamping monitor
07/25/1995US5436761 Projection exposure apparatus and polarizer
07/25/1995US5436725 Cofocal optical system for thickness measurements of patterned wafers
07/25/1995US5436693 Substrate holding apparatus and a system using the same
07/25/1995US5436586 Semiconductor integrated circuit apparatus including supply voltage conversion circuit
07/25/1995US5436581 Circuit arrangement for monitoring the drain current of a metal oxide semiconductor field effect transistor
07/25/1995US5436573 High-speed semiconductor integrated circuit device with reduced delay in gate-to-gate wiring
07/25/1995US5436572 Semiconductor integrated circuuit device of dual configuration having enhanced soft error withstanding capacity
07/25/1995US5436571 Probing test method of contacting a plurality of probes of a probe card with pads on a chip on a semiconductor wafer
07/25/1995US5436568 Pivotable self-centering elastomer pressure-wafer probe
07/25/1995US5436558 Testing integrated circuit using an A/D converter built in a semiconductor chip
07/25/1995US5436552 Clamping circuit for clamping a reference voltage at a predetermined level
07/25/1995US5436506 Semiconductor memory device and the manufacturing method thereof
07/25/1995US5436505 Titanium oxidation and diffusion resistance layer formed on titanium contact; used for diodes, transistors and thermistors
07/25/1995US5436504 Interconnect structures having tantalum/tantalum oxide layers
07/25/1995US5436503 Semiconductor device and method of manufacturing the same
07/25/1995US5436500 Surface mount semiconductor package
07/25/1995US5436499 High performance GaAs devices and method
07/25/1995US5436498 A semiconductor substrate comprising a specific region, at this position by feeding a reactive element scavenging the metal impurities; noncontamination
07/25/1995US5436497 Semiconductor device having a plurality of vertical type transistors having non-intersecting interconnections
07/25/1995US5436495 Device isolation area structure in semiconductor device
07/25/1995US5436494 Temperature sensor calibration wafer structure and method of fabrication
07/25/1995US5436492 Charge-coupled device image sensor
07/25/1995US5436490 Semiconductor device having ferroelectrics layer
07/25/1995US5436489 Field effect transistor
07/25/1995US5436488 Trench isolator structure in an integrated circuit
07/25/1995US5436487 Output circuit having three power supply lines
07/25/1995US5436486 High voltage MIS transistor and semiconductor device
07/25/1995US5436484 Semiconductor integrated circuit device having input protective elements and internal circuits
07/25/1995US5436483 Semiconductor integrated circuit device having a first MISFET of an output buffer circuit and a second MISFET of an internal circuit
07/25/1995US5436482 MOSFET with assymetric lightly doped source-drain regions
07/25/1995US5436481 MOS-type semiconductor device and method of making the same
07/25/1995US5436479 Electrically programmable integrated memory with only one transistor
07/25/1995US5436478 Fast access AMG EPROM with segment select transistors which have an increased width
07/25/1995US5436477 Semiconductor memory device with high dielectric capacitor structure
07/25/1995US5436476 CCD image sensor with active transistor pixel
07/25/1995US5436475 Bipolar transistor for high power in the microwave range
07/25/1995US5436468 Nonscattering
07/25/1995US5436424 Plasma generating method and apparatus for generating rotating electrons in the plasma
07/25/1995US5436410 Method and structure for suppressing stress-induced defects in integrated circuit conductive lines
07/25/1995US5436205 Forming a tungsten silicide conductive layer over indium-gallium arsenide semiconductor layer, masking and pattering conductive layer by etching, redeposition silicide on side portion, removal of exposed silicide layer by etching
07/25/1995US5436204 Recrystallization method to selenization of thin-film Cu(In,Ga)Se2 for semiconductor device applications
07/25/1995US5436202 Method and apparatus for hermetically sealing semiconductor package
07/25/1995US5436201 Dual etchant process, particularly for gate recess fabrication in GaAs MMIC chips
07/25/1995US5436200 Increasing the adhesion of tungsten and silicon oxide layer by first forming a silicon layer, then tungsten silicide with tungsten fluoride, reducing to tungsten
07/25/1995US5436199 Pillar alignment and formation process
07/25/1995US5436198 Method of manufacturing semiconductor device having straight wall bump
07/25/1995US5436192 Method of fabricating semiconductor structures via photo induced evaporation enhancement during in situ epitaxial growth
07/25/1995US5436191 Quantum wire fabrication via photo induced evaporation enhancement during in situ epitaxial growth
07/25/1995US5436190 Method for fabricating semiconductor device isolation using double oxide spacers
07/25/1995US5436189 Self-aligned channel stop for trench-isolated island
07/25/1995US5436188 Dram cell process having elk horn shaped capacitor
07/25/1995US5436187 Process for fabricating a semiconductor memory device including a capacitor having a cylindrical storage node electrode
07/25/1995US5436186 Process for fabricating a stacked capacitor
07/25/1995US5436184 Thin film transistor and manufacturing method thereof
07/25/1995US5436181 Method of self aligning an emitter contact in a heterojunction bipolar transistor
07/25/1995US5436180 Method for reducing base resistance in epitaxial-based bipolar transistor
07/25/1995US5436178 Method of making semiconductor device including MOS type field effect transistor
07/25/1995US5436177 Process for forming implanted regions with lowered channeling risk on semiconductors
07/25/1995US5436176 Method for fabricating a semiconductor device by high energy ion implantation while minimizing damage within the semiconductor substrate
07/25/1995US5436175 Shallow SIMOX processing method using molecular ion implantation
07/25/1995US5436174 Method of forming trenches in monocrystalline silicon carbide
07/25/1995US5436173 Method for forming a semiconductor on insulator device
07/25/1995US5436172 Real-time multi-zone semiconductor wafer temperature and process uniformity control system
07/25/1995US5436107 Positive resist composition
07/25/1995US5436098 Multilayer element with quinone diazide, resin and aromatic hydroxy compound for relief images
07/25/1995US5436097 Mask for evaluation of aligner and method of evaluating aligner using the same
07/25/1995US5436096 Lithography
07/25/1995US5436095 Manufacturing method or an exposing method for a semiconductor device for a semiconductor integrated circuit device and a mask used therefor
07/25/1995US5436084 To form borosilicate ceramic
07/25/1995US5436083 Protective electronic coatings using filled polysilazanes
07/25/1995US5436029 Curing silicon hydride containing materials by exposure to nitrous oxide
07/25/1995US5435953 Method of molding resin for sealing an electronic device
07/25/1995US5435888 Enhanced planarization technique for an integrated circuit
07/25/1995US5435886 Electron cyclotron resonance plasma etching
07/25/1995US5435881 Apparatus for producing planar plasma using varying magnetic poles
07/25/1995US5435880 Plasma processing apparatus
07/25/1995US5435876 Grid array masking tape process
07/25/1995US5435875 Method of manufacturing cavitied ceramic multilayer block
07/25/1995US5435856 Multiple-quantum-well semiconductor structures with selective electrical contacts and method of fabrication
07/25/1995US5435683 Load-lock unit and wafer transfer system
07/25/1995US5435681 Pusher device for plate-form articles
07/25/1995US5435646 Temperature measurement using ion implanted wafers
07/25/1995US5435482 Integrated circuit having a coplanar solder ball contact array
07/25/1995US5435477 Wire clampers
07/25/1995US5435379 Method and apparatus for low-temperature semiconductor processing
07/25/1995US5435075 Spindrier