| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 06/08/1995 | WO1995015406A1 Ultrapure gas and pure water feed duct, system and process equipment |
| 06/08/1995 | DE4443013A1 Charge transfer device e.g. for two=dimensional linear sensor or delay element |
| 06/08/1995 | DE4442432A1 Prodn. of a capacitor for semiconductor storage device |
| 06/08/1995 | DE4414969C1 Micromechanical component for acceleration or inclination sensor |
| 06/08/1995 | DE4341634A1 Transport of substrate discs in a vacuum coating plant |
| 06/08/1995 | DE4341517A1 Transistor constructional element preventing short circuit channel effect |
| 06/08/1995 | DE4341516A1 Mfr. of submicron transistors, e.g. CMOS transistors |
| 06/08/1995 | DE4341509A1 Prodn. of LDD MOS transistor |
| 06/08/1995 | DE4341506A1 MOSFET with potentially unconnected source and drain regions |
| 06/08/1995 | DE4340956A1 Working integrated circuits with high energy beam |
| 06/07/1995 | EP0656741A2 Semiconductor package |
| 06/07/1995 | EP0656689A2 Transistor circuit apparatus |
| 06/07/1995 | EP0656664A1 Polycrystalline silicon photoelectric transducer and process for its production |
| 06/07/1995 | EP0656663A2 Non-volatile semiconductor memory device and method for erasure and production thereof |
| 06/07/1995 | EP0656660A2 BiCMOS process for supporting merged devices |
| 06/07/1995 | EP0656656A2 Integrated interconnect for very high density DRAMS |
| 06/07/1995 | EP0656655A2 A self-aligned buried strap for trench type DRAM cells |
| 06/07/1995 | EP0656654A2 Methods for fabricating low leakage substrate plate trench dram cells and devices formed thereby |
| 06/07/1995 | EP0656653A1 Method of manufacturing shallow junction field effect transistor |
| 06/07/1995 | EP0656652A2 Method of forming isolation trenches in integrated circuits |
| 06/07/1995 | EP0656651A2 Process for the manufacturing of an integrated circuit device |
| 06/07/1995 | EP0656650A1 Method of evaluating current-driven conductive material |
| 06/07/1995 | EP0656649A1 Field effect transistor with landing pad |
| 06/07/1995 | EP0656648A1 Circuit and method of using an oxide layer to attach a semiconductor die to a die pad |
| 06/07/1995 | EP0656647A1 Method of fabricating an integrated circuit device comprising at least a MOS transistor |
| 06/07/1995 | EP0656646A1 Method of making devices with buried layers by epitaxial growth |
| 06/07/1995 | EP0656645A2 Field effect transistor with a sealed diffusion junction |
| 06/07/1995 | EP0656644A1 Method of manufacturing a crystallized semiconductor layer and semiconductor devices using it |
| 06/07/1995 | EP0656643A1 Method for determining the minority carrier surface recombination lifetime constant(ts) of a specimen of semiconductor material |
| 06/07/1995 | EP0656629A2 Gate power supply |
| 06/07/1995 | EP0656627A2 An adjustable threshold voltage circuit |
| 06/07/1995 | EP0656573A2 Method for moving a material removal tool with low tool accelerations |
| 06/07/1995 | EP0656565A1 Exposure method and method of producing a photolithographic mask |
| 06/07/1995 | EP0656431A2 Metal-organic chemical vapor-phase deposition process |
| 06/07/1995 | EP0656405A2 Aqueous stripping compositions containing a hydroxylamine and an alkanolamine and use thereof |
| 06/07/1995 | EP0656310A1 Method and apparatus for producing a laminate |
| 06/07/1995 | EP0656151A1 Antifuse structure and method for forming |
| 06/07/1995 | EP0656149A1 Improved back-side hydrogenation technique for defect passivation in silicon solar cells |
| 06/07/1995 | EP0656031A1 Polymeric substrate with polymeric microelements |
| 06/07/1995 | CN1103511A Process for smoothing the edge of semiconductor wafers |
| 06/07/1995 | CN1103501A A device for applying a lacquer coating to a disc-shaped registration carrier |
| 06/07/1995 | CN1103423A Electrically conductive adhesives |
| 06/07/1995 | CN1028819C Method and apparatus for forming diffusion junctions in solar cell substrates |
| 06/07/1995 | CN1028817C Method to form interlamination insulation film of semiconductor device |
| 06/06/1995 | US5422844 Nonvolatile semiconductor memory |
| 06/06/1995 | US5422843 Method of erasing information in memory cells |
| 06/06/1995 | US5422839 Semiconductor memory device |
| 06/06/1995 | US5422788 Technique for enhancing adhesion capability of heat spreaders in molded packages |
| 06/06/1995 | US5422731 Semiconductor arrangement made of compound semiconductor material |
| 06/06/1995 | US5422724 Multiple-scan method for wafer particle analysis |
| 06/06/1995 | US5422723 Diffraction gratings for submicron linewidth measurement |
| 06/06/1995 | US5422592 Input circuit of semiconductor integrated circuit device |
| 06/06/1995 | US5422582 Diode coupled CMOS logic design for quasi-static resistive dissipation with multi-output capability |
| 06/06/1995 | US5422579 Method of identifying probe position and probing method in prober |
| 06/06/1995 | US5422516 Electronic parts loaded module including thermal stress absorbing projecting electrodes |
| 06/06/1995 | US5422512 Semiconductor device and reticle used for fabricating the same |
| 06/06/1995 | US5422509 Integrated current-limiter device for power MOS transistors |
| 06/06/1995 | US5422508 BiCDMOS structure |
| 06/06/1995 | US5422507 Electrical isolation in integrated circuits |
| 06/06/1995 | US5422506 Field effect transistor structure heavily doped source/drain regions and lightly doped source/drain regions |
| 06/06/1995 | US5422505 FET having gate insulating films whose thickness is different depending on portions |
| 06/06/1995 | US5422502 Base region comprises of silicon-germanium alloy or super-lattice structure comprising alternate layers of silicon and silicon-germanium alloy; telecommunication application |
| 06/06/1995 | US5422501 Method of integrating heterojunction bipolar transistors with heterojunction FETs and PIN diodes |
| 06/06/1995 | US5422499 Semiconductor memory cell |
| 06/06/1995 | US5422496 Interband single-electron tunnel transistor and integrated circuit |
| 06/06/1995 | US5422441 Master slice integrated circuit having a reduced chip size and a reduced power supply noise |
| 06/06/1995 | US5422315 Method for forming self-aligned contact hole and semiconductor device having self-aligned contact hole |
| 06/06/1995 | US5422314 Lead frame and production method for producing semiconductor device using the lead frame |
| 06/06/1995 | US5422313 Integrated circuit device and manufacturing method using photoresist lead covering |
| 06/06/1995 | US5422312 Method for forming metal via |
| 06/06/1995 | US5422311 Depositing in situ phosphorus doped amorphous silicon film on substrate, annealing to form polysilicon and increase grain size, depositing tungsten silicide film, annealing to form polycide film with silicon layer at boundary, patterning |
| 06/06/1995 | US5422310 Method of forming interconnection in semiconductor device |
| 06/06/1995 | US5422309 Method for producing a metallization level having contacts and interconnects connecting the contacts |
| 06/06/1995 | US5422308 Method of fabricating a tungsten contact |
| 06/06/1995 | US5422306 Method of forming semiconductor hetero interfaces |
| 06/06/1995 | US5422305 Method of forming implanted silicon resonant tunneling barriers |
| 06/06/1995 | US5422304 Forming transparent electrode, and thin film of chalcopyrite compouds by sputtering, and using ion beam or molecular beam; doping chalcopyrite film to form a homojunction |
| 06/06/1995 | US5422303 Method for manufacturing a laterally limited, single-crystal region on a substrate and the employment thereof for the manufacture of an MOS transistor and a bipolar transistor |
| 06/06/1995 | US5422302 Method for producing a three-dimensional semiconductor device |
| 06/06/1995 | US5422301 Method of manufacturing semiconductor device with MOSFET |
| 06/06/1995 | US5422300 Method for forming electrical isolation in an integrated circuit |
| 06/06/1995 | US5422299 Method of forming single crystalline electrical isolated wells |
| 06/06/1995 | US5422298 Method of manufacturing a precision integrated resistor |
| 06/06/1995 | US5422297 Method for forming a semiconductor device |
| 06/06/1995 | US5422296 Process for forming a static-random-access memory cell |
| 06/06/1995 | US5422295 Method for forming a semiconductor memory device having a vertical multi-layered storage electrode |
| 06/06/1995 | US5422293 Method for manufacturing a TFT panel |
| 06/06/1995 | US5422292 Process for fabricating split gate flash EEPROM memory |
| 06/06/1995 | US5422291 Method of making an EPROM cell with a readily scalable interpoly dielectric |
| 06/06/1995 | US5422290 Method of fabricating BiCMOS structures |
| 06/06/1995 | US5422289 Method of manufacturing a fully planarized MOSFET and resulting structure |
| 06/06/1995 | US5422288 Method of doping a JFET region in a MOS-gated semiconductor device |
| 06/06/1995 | US5422287 Thin film transistor and process for producing the same |
| 06/06/1995 | US5422286 Process for fabricating high-voltage semiconductor power device |
| 06/06/1995 | US5422228 Method of producing thin film multi-layered substrate |
| 06/06/1995 | US5422223 Polysilsesquioxanes having diazonaphthoquinone sulfonyloxy group modifiers; barrier films for lithographic process |
| 06/06/1995 | US5422221 Hydrogen atoms of hydroxyl groups in novolac resin replaced by 1,2-naphthoquinonediazidosulfonyl group; sensitiivity, resolution, heat resistance |
| 06/06/1995 | US5422206 Anti-reflection film inserted between a transparent glass substrate and light shielding pattern |
| 06/06/1995 | US5422205 Micropattern forming method |
| 06/06/1995 | US5422190 Via fill paste and method of using the same containing specific amounts of silver, gold and refractory oxides |