Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2013
08/22/2013WO2013120867A1 Method for forming a gettering layer
08/22/2013WO2013098794A3 Nickel allyl amidinate precursors for deposition of nickel-containing films
08/22/2013WO2013095147A4 Method of bonding two substrates and device manufactured thereby
08/22/2013WO2013089824A8 Nanowire thermoelectric infrared detector
08/22/2013WO2013089711A9 Metal-insulator-metal (mim) capacitor with insulator stack having a plurality of metal oxide layers
08/22/2013WO2013086432A3 High throughput load lock for solar wafers
08/22/2013WO2013052398A3 Stub minimization for assemblies without wirebonds to package substrate
08/22/2013WO2012092064A8 Wafer processing with carrier extension
08/22/2013US20130218316 Endpoint detector for a semiconductor processing station and associated methods
08/22/2013US20130218241 Membrane-Supported, Thermoelectric Compositions
08/22/2013US20130217309 Polishing pad and method for producing same
08/22/2013US20130217243 Doping of dielectric layers
08/22/2013US20130217242 Substrate Processing Apparatus, Method of Manufacturing Semiconductor Device and Program
08/22/2013US20130217241 Treatments for decreasing etch rates after flowable deposition of silicon-carbon-and-nitrogen-containing layers
08/22/2013US20130217240 Flowable silicon-carbon-nitrogen layers for semiconductor processing
08/22/2013US20130217239 Flowable silicon-and-carbon-containing layers for semiconductor processing
08/22/2013US20130217238 Substrate Processing Including A Masking Layer
08/22/2013US20130217237 Spin-on dielectric method with multi-stage ramping temperature
08/22/2013US20130217236 Semiconductor device, method for producing the semiconductor device, substrate for semiconductor element and method for producing the substrate
08/22/2013US20130217235 Apparatus and method for controlling silicon nitride etching tank
08/22/2013US20130217234 Cleaning solution and damascene process using the same
08/22/2013US20130217233 Methods for Controlling Line Dimensions in Spacer Alignment Double Patterning Semiconductor Processing
08/22/2013US20130217232 Method of Fabricating Semiconductor Cleaners
08/22/2013US20130217231 Chemical mechanical polishing (cmp) composition
08/22/2013US20130217230 Chemical Mechanical Polishing Composition And Methods Relating Thereto
08/22/2013US20130217229 Polishing liquid for metal film and polishing method
08/22/2013US20130217228 Method for fabricating semiconductor device
08/22/2013US20130217227 Method of metal deposition
08/22/2013US20130217226 Method for manufacturing a semiconductor device
08/22/2013US20130217225 Method for manufacturing semiconductor device
08/22/2013US20130217224 Micro Bump And Method For Forming The Same
08/22/2013US20130217223 Methods of Stripping Resist After Metal Deposition
08/22/2013US20130217222 Large-scale graphene sheet: articles, compositions, methods and devices incorporating same
08/22/2013US20130217221 Dry etch polysilicon removal for replacement gates
08/22/2013US20130217220 Replacement gate electrode with a tantalum alloy metal layer
08/22/2013US20130217219 Replacement gate with reduced gate leakage current
08/22/2013US20130217217 Pattern forming method, semiconductor device manufacturing method, and coating apparatus
08/22/2013US20130217215 Graphene nanoelectronic device fabrication
08/22/2013US20130217214 Closed-Space Annealing Process for Production of CIGS Thin-Films
08/22/2013US20130217213 Production process of epitaxial silicon carbide single crystal substrate
08/22/2013US20130217212 Fabrication method of nitride forming on silicon substrate
08/22/2013US20130217211 Controlled-Pressure Process for Production of CZTS Thin-Films
08/22/2013US20130217210 Method and device for controlling pattern and structure formation by an electric field
08/22/2013US20130217209 Method for forming a cleaved facet of semiconductor device
08/22/2013US20130217208 Method of Processing Wafers for Saving Material and Protecting Environment
08/22/2013US20130217207 Method for directly adhering two plates together, including a step of forming a temporary protective nitrogen layer
08/22/2013US20130217206 Methods of providing thin layers of crystalline semiconductor material, and related structures and devices
08/22/2013US20130217205 Methods for fabricating semiconductor devices with isolation regions having uniform stepheights
08/22/2013US20130217204 Methods for fabricating integrated circuits
08/22/2013US20130217199 Method for fabricating resistive memory device
08/22/2013US20130217195 Transistor Device and Method of Manufacture Thereof
08/22/2013US20130217190 Low external resistance etsoi transistors
08/22/2013US20130217189 Method of manufacturing semiconductor device and method of manufacturing electronic device
08/22/2013US20130217188 Structures and Formation Methods of Packages with Heat Sinks
08/22/2013US20130217187 Film for forming protective layer
08/22/2013US20130217186 Method of manufacturing semiconductor device and method of manufacturing electronic assembly
08/22/2013US20130217185 Power device manufacture on the recessed side of a thinned wafer
08/22/2013US20130217184 Semiconductor device manufacturing method and electronic device manufacturing method
08/22/2013US20130217181 Method of manufacturing semiconductor package
08/22/2013US20130217180 Low-Temperature Fabrication of Metal Oxide Thin Films and Nanomaterial-Derived Metal Composite Thin Films
08/22/2013US20130217175 Closed-Space Sublimation Process for Production of CZTS Thin-Films
08/22/2013US20130217174 Method for manufacturing a semiconductor device
08/22/2013US20130217171 Method for fabricating semiconductor layer having textured surface and method for fabricating solar cell
08/22/2013US20130217162 Method for forming a cleaved facet of semiconductor device
08/22/2013US20130217157 Method for fabricating semiconductor laser
08/22/2013US20130217156 Method, mask and system for manufacturing solar cell
08/22/2013US20130217155 Pattern forming method, pattern forming apparatus, and method for manufacturing semiconductor device
08/22/2013US20130217152 Systems and methods for flexible components for powered cards and devices
08/22/2013US20130216780 Vicinal surfaces of polycrystalline structures
08/22/2013US20130216466 Chunk polycrystalline silicon and process for cleaning polycrystalline silicon chunks
08/22/2013US20130216348 Apparatus for transferring a solar wafer or solar cell during its fabrication
08/22/2013US20130216336 Automatic carrier transfer for transferring a substrate carrier in a semiconductor manufacturing post-process and method of transferring the substrate carrier using the same
08/22/2013US20130216178 Nanotube electro-optical component, optronic or optical link-based hybrid integrated circuit integrating this component, and method of fabrication
08/22/2013US20130215684 Nonvolatile memory device, method for operating the same, and method for fabricating the same
08/22/2013US20130215352 Liquid crystal display device and manufacturing method thereof
08/22/2013US20130214855 Integrated Circuit Die Stacks With Rotationally Symmetric VIAS
08/22/2013US20130214815 Pld architecture for flexible placement of ip function blocks
08/22/2013US20130214497 Substrate rotation holding apparatus and substrate processing apparatus
08/22/2013US20130214435 Epoxy encapsulating and lamination adhesive and method of making same
08/22/2013US20130214434 Semiconductor device and manufacturing method thereof
08/22/2013US20130214432 Stacked die assembly
08/22/2013US20130214431 Fine-Pitch Package-on-Package Structures and Methods for Forming the Same
08/22/2013US20130214430 Integrated circuit packaging system with formed under-fill and method of manufacture thereof
08/22/2013US20130214428 Semiconductor device having non-planar interface between a plug layer and a contact layer
08/22/2013US20130214424 Structure and manufacturing method for reducing stress of chip
08/22/2013US20130214423 Methods for fabrication of semiconductor structures including interposers with conductive vias, and related structures and devices
08/22/2013US20130214421 Disabling electrical connections using pass-through 3d interconnects and associated systems and methods
08/22/2013US20130214419 Semiconductor packaging method and structure thereof
08/22/2013US20130214417 Methods of forming a metal silicide region on at least one silicon structure
08/22/2013US20130214415 Metal Layer Air Gap Formation
08/22/2013US20130214414 Interconnect structures and methods of manufacturing of interconnect structures
08/22/2013US20130214413 Conductive line structures and methods of forming the same
08/22/2013US20130214412 Method of forming thin film interconnect and thin film interconnect
08/22/2013US20130214411 Metal interconnect of semiconductor device and method of manufacturing the same
08/22/2013US20130214407 Semiconductor packaging method and structure thereof
08/22/2013US20130214402 Semiconductor package and method for manufacturing the same
08/22/2013US20130214401 System and Method for Fine Pitch PoP Structure
08/22/2013US20130214400 Micro-electro mechanical systems (mems) structures and methods of forming the same
08/22/2013US20130214399 DC/DC Converter Power Module Package Incorporating a Stacked Controller and Construction Methodology
08/22/2013US20130214395 Semiconductor device and manufacturing method
1 ... 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 ... 6590