Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2013
09/17/2013US8536440 Semiconductor nanowire thermoelectric materials and devices, and processes for producing same
09/17/2013US8536073 Hardmask materials
09/17/2013US8536072 Semiconductor process
09/17/2013US8536071 Gasket with positioning feature for clamped monolithic showerhead electrode
09/17/2013US8536070 Vapor deposition of silicon dioxide nanolaminates
09/17/2013US8536069 Multilayered low k cap with conformal gap fill and UV stable compressive stress properties
09/17/2013US8536068 Atomic layer deposition of photoresist materials and hard mask precursors
09/17/2013US8536066 Methods of forming SiC MOSFETs with high inversion layer mobility
09/17/2013US8536065 Ultra high selectivity doped amorphous carbon strippable hardmask development and integration
09/17/2013US8536064 Double patterning strategy for contact hole and trench in photolithography
09/17/2013US8536063 MRAM etching processes
09/17/2013US8536062 Chemical removal of oxide layer from chip pads
09/17/2013US8536061 Semiconductor device manufacturing method
09/17/2013US8536060 Method for clearing native oxide
09/17/2013US8536059 Equipment and methods for etching of MEMS
09/17/2013US8536058 Method of growing electrical conductors
09/17/2013US8536057 Thin film deposition apparatus and method of manufacturing organic light emitting device by using the same
09/17/2013US8536056 Method of forming conductive pattern
09/17/2013US8536054 Laser polishing of a solar cell substrate
09/17/2013US8536053 Method for restricting lateral encroachment of metal silicide into channel region
09/17/2013US8536052 Semiconductor device comprising contact elements with silicided sidewall regions
09/17/2013US8536051 Manufacture method for semiconductor device
09/17/2013US8536050 Selective shrinkage of contact elements in a semiconductor device
09/17/2013US8536049 Method for forming metal contacts
09/17/2013US8536048 Method of manufacturing electronic component
09/17/2013US8536047 Methods and systems for material bonding
09/17/2013US8536046 Partitioned through-layer via and associated systems and methods
09/17/2013US8536045 Reflow method
09/17/2013US8536044 Protecting bond pad for subsequent processing
09/17/2013US8536043 Reduced S/D contact resistance of III-V MOSFET using low temperature metal-induced crystallization of n+ Ge
09/17/2013US8536042 Method of forming a topside contact to a backside terminal of a semiconductor device
09/17/2013US8536039 Nano-crystal gate structure for non-volatile memory
09/17/2013US8536038 Manufacturing method for metal gate using ion implantation
09/17/2013US8536036 Predoped semiconductor material for a high-K metal gate electrode structure of P- and N-channel transistors
09/17/2013US8536035 Silicon-on-insulator substrate and method of forming
09/17/2013US8536034 Methods of forming stressed silicon-carbon areas in an NMOS transistor
09/17/2013US8536033 SOI semiconductor device comprising a substrate diode and a film diode formed by using a common well implantation mask
09/17/2013US8536032 Formation of embedded stressor through ion implantation
09/17/2013US8536031 Method of fabricating dual damascene structures using a multilevel multiple exposure patterning scheme
09/17/2013US8536030 Semipolar semiconductor crystal and method for manufacturing the same
09/17/2013US8536029 Nanowire FET and finFET
09/17/2013US8536028 Self alignment and assembly fabrication method for stacking multiple material layers
09/17/2013US8536027 Method for making a semi-conducting substrate located on an insulation layer
09/17/2013US8536026 Selective growth method, nitride semiconductor light emitting device and manufacturing method of the same
09/17/2013US8536025 Resized wafer with a negative photoresist ring and design structures thereof
09/17/2013US8536024 Processing method for a workpiece, dividing method for a workpiece, and laser processing apparatus
09/17/2013US8536023 Method of manufacturing a semiconductor device and structure
09/17/2013US8536022 Method of growing composite substrate using a relaxed strained layer
09/17/2013US8536021 Trap rich layer formation techniques for semiconductor devices
09/17/2013US8536020 Combination of a substrate and a wafer
09/17/2013US8536019 Semiconductor devices having encapsulated isolation regions and related fabrication methods
09/17/2013US8536017 Method of manufacturing semiconductor device
09/17/2013US8536016 Integrated circuit system with hierarchical capacitor and method of manufacture thereof
09/17/2013US8536015 Memory cell that includes a carbon-based memory element and methods of forming the same
09/17/2013US8536014 Self aligned silicide device fabrication
09/17/2013US8536013 Forming phase change memory cells
09/17/2013US8536012 Bipolar junction transistors with a link region connecting the intrinsic and extrinsic bases
09/17/2013US8536011 Junction leakage suppression in memory devices
09/17/2013US8536010 Method for making a disilicide
09/17/2013US8536009 Differential threshold voltage adjustment in PMOS transistors by differential formation of a channel semiconductor material
09/17/2013US8536008 Manufacturing method of vertical channel transistor array
09/17/2013US8536007 Non-volatile memory cell and logic transistor integration
09/17/2013US8536006 Logic and non-volatile memory (NVM) integration
09/17/2013US8536005 Semiconductor integrated circuit device and manufacturing method thereof
09/17/2013US8536004 Method for fabricating semiconductor power device
09/17/2013US8536003 Method for fabricating semiconductor power device
09/17/2013US8536002 Bipolar transistor in bipolar-CMOS technology
09/17/2013US8536001 Method for forming semiconductor device
09/17/2013US8536000 Method for producing a semiconductor device have fin-shaped semiconductor regions
09/17/2013US8535999 Stress memorization process improvement for improved technology performance
09/17/2013US8535998 Method for fabricating a gate structure
09/17/2013US8535997 Wiring structure, thin film transistor substrate, method for manufacturing thin film transistor substrate, and display device
09/17/2013US8535996 Substrate having a charged zone in an insulating buried layer
09/17/2013US8535995 Method of manufacturing organic light-emitting display device
09/17/2013US8535994 Thin-film transistor array device manufacturing method
09/17/2013US8535993 Semiconductor device and method using a sacrificial layer
09/17/2013US8535992 Thyristor random access memory device and method
09/17/2013US8535991 Methods and systems involving electrically reprogrammable fuses
09/17/2013US8535990 SRAM cell with different crystal orientation than associated logic
09/17/2013US8535989 Embedded semiconductive chips in reconstituted wafers, and systems containing same
09/17/2013US8535988 Large panel leadframe
09/17/2013US8535987 Method of manufacturing substrate for semiconductor element, and semiconductor device
09/17/2013US8535986 Method of packaging an integrated circuit using a laser to remove material from a portion of a lead frame
09/17/2013US8535985 Method of making a semiconductor chip assembly with a bump/base heat spreader and an inverted cavity in the bump
09/17/2013US8535984 Electronic modules and methods for forming the same
09/17/2013US8535983 Method of manufacturing a semiconductor device
09/17/2013US8535982 Providing an automatic optical inspection feature for solder joints on semiconductor packages
09/17/2013US8535981 Integrated circuit package-on-package system with underfilling structures and method of manufacture thereof
09/17/2013US8535980 Method for producing vias in fan-out wafers using dry film and conductive paste, and a corresponding semiconductor package
09/17/2013US8535979 Method for manufacturing substrate for semiconductor element
09/17/2013US8535978 Die up fully molded fan-out wafer level packaging
09/17/2013US8535977 Semiconductor device manufacturing method
09/17/2013US8535976 Method for fabricating chip package with die and substrate
09/17/2013US8535971 Method for applying full back surface field and silver busbar to solar cell
09/17/2013US8535970 Manufacturing process for making photovoltaic solar cells
09/17/2013US8535969 Solar cell and manufacturing method thereof
09/17/2013US8535968 High speed aligning of photovoltaic cells
09/17/2013US8535967 Method and system for etching a diaphragm pressure sensor
09/17/2013US8535966 Horizontal coplanar switches and methods of manufacture
09/17/2013US8535965 Silicon nitride film, a semiconductor device, a display device and a method for manufacturing a silicon nitride film