| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 06/10/2004 | WO2004032202A3 Device and method for applying semiconductor chips to carriers |
| 06/10/2004 | WO2004032201A3 Method for producing low-resistance ohmic contacts between substrates and wells in cmos integrated circuits |
| 06/10/2004 | WO2004032196A3 Method of fabricating semiconductor by nitrogen doping of silicon film |
| 06/10/2004 | WO2004030069A3 Method of patterning capacitors and capacitors made thereby |
| 06/10/2004 | WO2004029994A3 Multilayer substrate |
| 06/10/2004 | WO2004027838A3 Fast gas exchange for thermal conductivity modulation |
| 06/10/2004 | WO2004025848A9 Improved inspection system for integrated applications |
| 06/10/2004 | WO2004023519A3 High-density nrom-finfet |
| 06/10/2004 | WO2004017398A3 Semiconductor-on-insulator device and method of its manufacture |
| 06/10/2004 | WO2004013922A3 Organic electronic devices |
| 06/10/2004 | WO2004013901A3 Batch furnace |
| 06/10/2004 | WO2004012300A3 Anisotropic conductive compound |
| 06/10/2004 | WO2004009489A3 Fabrication of 3d photopolymeric devices |
| 06/10/2004 | WO2004009289A8 Rising after chemical-mechanical planarization process applied on a wafer |
| 06/10/2004 | WO2004008255A3 Method and apparatus for measuring critical dimensions with a particle beam |
| 06/10/2004 | WO2004008163A3 Assembly for connecting a test device to an object to be tested |
| 06/10/2004 | WO2004006014A3 Method of using an amorphous carbon layer for improved reticle fabrication |
| 06/10/2004 | WO2003102724A3 Method and system for data handling, storage and manipulation |
| 06/10/2004 | WO2003098712A3 High-reliability group iii-nitride light emitting diode |
| 06/10/2004 | WO2003096393A3 Data archive recovery |
| 06/10/2004 | WO2003085704A3 Device for accommodating substrates |
| 06/10/2004 | WO2003065926A3 Wearable biomonitor with flexible thinned integrated circuit |
| 06/10/2004 | WO2003054929B1 Method for depositing iii-v semiconductor layers on a non-iii-v substrate |
| 06/10/2004 | WO2003050724A3 Timing model extraction by timing graph reduction |
| 06/10/2004 | WO2003049154A3 Integrated circuit processing system |
| 06/10/2004 | WO2003017340A3 A method for concurrent fabrication of a double polysilicon bipolar transistor and a base polysilicon resistor |
| 06/10/2004 | US20040111690 Method for composing memory on programmable platform devices to meet varied memory requirements with a fixed set of resources |
| 06/10/2004 | US20040111689 Scan path timing optimizing apparatus determining connection order of scan path circuits to realize optimum signal timings |
| 06/10/2004 | US20040111688 Methods, apparatus and computer program products for generating selective netlists that include interconnection influences at pre-layout and post-layout design stages |
| 06/10/2004 | US20040111658 Scan test circuit with reset control circuit |
| 06/10/2004 | US20040111657 Semiconductor device and method for testing the same |
| 06/10/2004 | US20040111571 Semiconductor storage |
| 06/10/2004 | US20040111358 Enhanced parimutuel wagering |
| 06/10/2004 | US20040111230 Method of detecting a pattern and an apparatus thereof |
| 06/10/2004 | US20040111180 In-situ randomization and recording of wafer processing order at process tools |
| 06/10/2004 | US20040111176 In-situ randomization and recording of wafer processing order at process tools |
| 06/10/2004 | US20040111175 Method of and apparatus for controlling the chemical mechanical polishing of multiple layers on a substrate |
| 06/10/2004 | US20040110896 Insulation film |
| 06/10/2004 | US20040110854 pore generating material containing quaternaryammonium compound with si-o- groups, a quaternaryammonium salt, a thermo-stable organic or inorganic matrix precursor and a solvent |
| 06/10/2004 | US20040110395 Method for fabricating semiconductor device |
| 06/10/2004 | US20040110394 Method and apparatus for controlling coating thickness |
| 06/10/2004 | US20040110393 Method for structuring an oxide layer applied to a substrate material |
| 06/10/2004 | US20040110392 N/PMOS saturation current, HCE, and Vt stability by contact etch stop film modifications |
| 06/10/2004 | US20040110391 Atomic layer deposited Zr-Sn-Ti-O films |
| 06/10/2004 | US20040110390 Semiconductor memory device and method of fabricating the same |
| 06/10/2004 | US20040110389 Active bromine containing etchant and an active chlorine etchant; hydrogen bromide and hydrogen chloride; microelectronics |
| 06/10/2004 | US20040110387 Multi-layer gate stack |
| 06/10/2004 | US20040110386 Method and device for photo-electrochemically etching a semiconductor sample, especially gallium nitride |
| 06/10/2004 | US20040110385 Method for forming a semiconductor device |
| 06/10/2004 | US20040110384 Detecting method for dry etching machine |
| 06/10/2004 | US20040110383 Method of forming device isolation trench |
| 06/10/2004 | US20040110381 Chemical mechanical polishing method and apparatus |
| 06/10/2004 | US20040110380 TEOS assisted oxide CMP process |
| 06/10/2004 | US20040110379 Stopper for chemical mechanical planarization, method for manufacturing same, and chemical mechanical planarization method |
| 06/10/2004 | US20040110378 Recycling of a wafer comprising a buffer layer after having separated a thin layer therefrom by mechanical means |
| 06/10/2004 | US20040110377 Method of forming a contact in a semiconductor device |
| 06/10/2004 | US20040110376 Method of manufacturing semiconductor device |
| 06/10/2004 | US20040110375 Method and system for etching high-k dielectric materials |
| 06/10/2004 | US20040110374 Precursor for solution that activates surface to facilitate electroless plating of copper including water, chloride ions, copper, tin/ii/ and nickel ions for formation of activator layer, antioxidant compound which prevents oxidation of tin |
| 06/10/2004 | US20040110373 Completely enclosed copper structure to avoid copper damage for damascene processes |
| 06/10/2004 | US20040110372 Methods of cleaning surfaces of copper-containing materials, and methods of forming openings to copper-containing substrates |
| 06/10/2004 | US20040110371 Selective silicide blocking |
| 06/10/2004 | US20040110370 Method of manufacturing a semiconductor device |
| 06/10/2004 | US20040110369 Methods for forming single damascene via or trench cavities and for forming dual damascene via cavities |
| 06/10/2004 | US20040110368 Method and system for reducing contact defects using non conventional contact formation method for semiconductor cells |
| 06/10/2004 | US20040110367 Semiconductor device and manufacturing method thereof |
| 06/10/2004 | US20040110366 Forming solder balls on substrates |
| 06/10/2004 | US20040110365 Method of forming a planarized bond pad structure |
| 06/10/2004 | US20040110364 Method for making UBM pads and bumps on wafer |
| 06/10/2004 | US20040110363 Method of forming a novel composite insulator spacer |
| 06/10/2004 | US20040110362 High coupling floating gate transistor |
| 06/10/2004 | US20040110361 Method for making a semiconductor device having an ultra-thin high-k gate dielectric |
| 06/10/2004 | US20040110360 Methods of Forming Regions of Differing Composition Over a Substrate |
| 06/10/2004 | US20040110358 Method for forming isolation film for semiconductor devices |
| 06/10/2004 | US20040110356 Method for forming capacitor of semiconductor device |
| 06/10/2004 | US20040110355 Embedded MIM capacitor and zigzag inductor scheme |
| 06/10/2004 | US20040110354 Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related tooling |
| 06/10/2004 | US20040110353 Bipolar junction transistor with reduced parasitic bipolar conduction |
| 06/10/2004 | US20040110352 Source drain and extension dopant concentration |
| 06/10/2004 | US20040110351 Method and structure for reduction of junction capacitance in a semiconductor device and formation of a uniformly lowered threshold voltage device |
| 06/10/2004 | US20040110350 Method of making a nanoscale electronic device |
| 06/10/2004 | US20040110349 Methods of testing/stressing a charge trapping device |
| 06/10/2004 | US20040110348 Atomic layer deposited Zr-Sn-Ti-O films using TiI4 |
| 06/10/2004 | US20040110347 Method of production of nanoparticle and nanoparticle produced by the method of production |
| 06/10/2004 | US20040110346 Etch stop layer for use in a self-aligned contact etch |
| 06/10/2004 | US20040110345 Vertical replacement-gate junction field-effect transistor |
| 06/10/2004 | US20040110344 [memory device and method for fabricating the same] |
| 06/10/2004 | US20040110343 Method for doping semiconductor layer, method for producing thin film semiconductor element and thin film semiconductor element |
| 06/10/2004 | US20040110342 Method for fabricating floating gate |
| 06/10/2004 | US20040110341 Method for forming capacitor of semiconductor device |
| 06/10/2004 | US20040110340 Method for manufacturing semiconductor device |
| 06/10/2004 | US20040110339 Buried digit spacer separated capacitor array |
| 06/10/2004 | US20040110338 Process for controlling performance characteristics of a negative differential resistance (NDR) device |
| 06/10/2004 | US20040110337 Adaptive negative differential resistance device |
| 06/10/2004 | US20040110336 Charge trapping device & method of forming the same |
| 06/10/2004 | US20040110335 Processing method and apparatus for annealing and doping semiconductor |
| 06/10/2004 | US20040110334 Effective Vcc TO Vss power ESD protection device |
| 06/10/2004 | US20040110333 High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching and ion implantation |
| 06/10/2004 | US20040110332 Integrated circuit having negative differential resistance (NDR) devices with varied peak-to-valley ratios (PVRs) |
| 06/10/2004 | US20040110331 CMOS inverters configured using multiple-gate transistors |