Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2005
01/04/2005US6838390 Method and apparatus for plasma etching a wafer
01/04/2005US6838389 High selectivity etching of a lead overlay structure
01/04/2005US6838388 Fabrication method of semiconductor integrated circuit device
01/04/2005US6838387 Fast etching system and process
01/04/2005US6838386 Method for precision-processing a fine structure
01/04/2005US6838384 Thin-film patterning method, manufacturing method of thin-film device and manufacturing method of thin-film magnetic head
01/04/2005US6838383 Copper polish slurry for reduced interlayer dielectric erosion and method of using same
01/04/2005US6838382 Method and apparatus for forming a planarizing pad having a film and texture elements for planarization of microelectronic substrates
01/04/2005US6838381 Methods for improving sheet resistance of silicide layer after removal of etch stop layer
01/04/2005US6838380 Fabrication of high resistivity structures using focused ion beams
01/04/2005US6838379 Process for reducing impurity levels, stress, and resistivity, and increasing grain size of copper filler in trenches and vias of integrated circuit structures to enhance electrical performance of copper filler
01/04/2005US6838378 Method for manufacturing semiconductor device
01/04/2005US6838377 High frequency circuit chip and method of producing the same
01/04/2005US6838376 Method of forming semiconductor wiring structures
01/04/2005US6838375 Buried digit line stack and process for making same
01/04/2005US6838374 Semiconductor integrated circuit device and method of fabricating the same
01/04/2005US6838373 Lightly doped drain MOS transistor
01/04/2005US6838372 Via interconnect forming process and electronic component product thereof
01/04/2005US6838371 Method of manufacturing semiconductor device
01/04/2005US6838370 Method of manufacturing semiconductor device and manufacturing apparatus
01/04/2005US6838369 Method for forming contact hole of semiconductor device
01/04/2005US6838368 Method for making semiconductor device using a nickel film for stopping etching
01/04/2005US6838367 Method for simultaneous formation of fuse and capacitor plate and resulting structure
01/04/2005US6838366 MOS transistors and methods for manufacturing the same
01/04/2005US6838365 Methods of forming electronic components, and a conductive line
01/04/2005US6838364 Sputtered tungsten diffusion barrier for improved interconnect robustness
01/04/2005US6838363 Circuit element having a metal silicide region thermally stabilized by a barrier diffusion material
01/04/2005US6838362 Process for manufacturing a through insulated interconnection in a body of semiconductor material
01/04/2005US6838361 Method of patterning a substrate
01/04/2005US6838360 Non-volatile semiconductor memory with single layer gate structure
01/04/2005US6838359 Suppression of n-type autodoping in low-temperature Si and SiGe epitaxy
01/04/2005US6838358 Method of manufacturing a wafer
01/04/2005US6838357 Chemical mechanical polishing for forming a shallow trench isolation structure
01/04/2005US6838356 Method of forming a trench isolation
01/04/2005US6838355 Damascene interconnect structures including etchback for low-k dielectric materials
01/04/2005US6838354 Method for forming a passivation layer for air gap formation
01/04/2005US6838353 Devices having improved capacitance and methods of their fabrication
01/04/2005US6838352 Damascene trench capacitor for mixed-signal/RF IC applications
01/04/2005US6838350 Triply implanted complementary bipolar transistors
01/04/2005US6838349 Semiconductor device and method for fabricating the same
01/04/2005US6838348 Integrated process for high voltage and high performance silicon-on-insulator bipolar devices
01/04/2005US6838347 Method for reducing line edge roughness of oxide material using chemical oxide removal
01/04/2005US6838346 Method of fabricating a high-voltage transistor with a multi-layered extended drain structure
01/04/2005US6838345 SiN ROM and method of fabricating the same
01/04/2005US6838344 Simplified twin monos fabrication method with three extra masks to standard CMOS
01/04/2005US6838343 Flash memory with self-aligned split gate and methods for fabricating and for operating the same
01/04/2005US6838342 Nonvolatile memory fabrication methods comprising lateral recessing of dielectric sidewalls at substrate isolation regions
01/04/2005US6838341 Method for fabricating semiconductor device with self-aligned storage node
01/04/2005US6838340 Method of manufacturing semiconductor device having MIM capacitor element
01/04/2005US6838339 Area-efficient stack capacitor
01/04/2005US6838338 Integrated capacitor bottom electrode for use with conformal dielectric
01/04/2005US6838337 Sense amplifier and architecture for open digit arrays
01/04/2005US6838336 Semiconductor devices having a non-volatile memory transistor and methods for manufacturing the same
01/04/2005US6838335 Method for fabricating a vertical transistor, and semiconductor memory cell having a trench capacitor and an associated vertical selection transistor
01/04/2005US6838334 Method of fabricating a buried collar
01/04/2005US6838333 Semiconductor memory device and method of producing the same
01/04/2005US6838332 Method for forming a semiconductor device having electrical contact from opposite sides
01/04/2005US6838330 Method of forming a contact hole of a semiconductor device
01/04/2005US6838329 High concentration indium fluorine retrograde wells
01/04/2005US6838328 Back-biased MOS device fabrication method
01/04/2005US6838327 Method for manufacturing semiconductor device having insulating film with N—H bond
01/04/2005US6838326 Semiconductor device, and method for manufacturing the same
01/04/2005US6838325 Method of forming a self-aligned, selectively etched, double recess high electron mobility transistor
01/04/2005US6838324 Semiconductor device provided with semiconductor circuit made of semiconductor element and method of fabricating the same
01/04/2005US6838322 Method for forming a double-gated semiconductor device
01/04/2005US6838321 Semiconductor substrate with defects reduced or removed and method of manufacturing the same, and semiconductor device capable of bidirectionally retaining breakdown voltage and method of manufacturing the same
01/04/2005US6838320 Method for manufacturing a semiconductor integrated circuit device
01/04/2005US6838316 Semiconductor device manufacturing method using ultrasonic flip chip bonding technique
01/04/2005US6838315 Semiconductor device manufacturing method wherein electrode members are exposed from a mounting surface of a resin encapsulator
01/04/2005US6838314 Substrate with stacked vias and fine circuits thereon, and method for fabricating the same
01/04/2005US6838313 Molded flip chip package
01/04/2005US6838311 Flip chip package and method for forming the same
01/04/2005US6838309 Flip-chip micromachine package using seal layer
01/04/2005US6838305 Method of fabricating a solid-state imaging device
01/04/2005US6838304 MEMS element manufacturing method
01/04/2005US6838300 Chemical treatment of low-k dielectric films
01/04/2005US6838299 Forming defect prevention trenches in dicing streets
01/04/2005US6838298 Method of manufacturing image sensor for reducing dark current
01/04/2005US6838297 Nanostructure, electron emitting device, carbon nanotube device, and method of producing the same
01/04/2005US6838296 Device and method for detecting alignment of deep trench capacitors and active areas in DRAM devices
01/04/2005US6838295 Method for determining the location of a droplet on a component
01/04/2005US6838294 Focused ion beam visual endpointing
01/04/2005US6838293 Method for controlling deposition of dielectric films
01/04/2005US6838223 Compositions for anti-reflective light absorbing layer and method for forming patterns in semiconductor device using the same
01/04/2005US6838216 Semiconductors; improved aerial image contrast
01/04/2005US6838170 Adhesive, adhesive member, interconnecting substrate for semiconductor mounting having adhesive member, and semiconductor device containing the same
01/04/2005US6838149 Abrasive article for the deposition and polishing of a conductive material
01/04/2005US6838127 Method and apparatus for forming an HSG-Si layer on a wafer
01/04/2005US6838126 Method for forming I-carbon film
01/04/2005US6838124 Deposition of fluorosilsesquioxane films
01/04/2005US6838117 Subjecting a hydrothermally formed film to hydrothermally processing in an aqueous solution having a pH of about 5 to 7
01/04/2005US6838115 Thermal processing system and methods for forming low-k dielectric films suitable for incorporation into microelectronic devices
01/04/2005US6838022 Anisotropic conductive compound
01/04/2005US6838016 Abrasive comprising silicon dioxide, aluminum, cerium, zirconium, titanium oxides, polyalkyleneimine, quinaldic acid and derivatives, glycine, alanine, histidine and derivatives, benzotriazole, hydrogen peroxide; for semiconductors
01/04/2005US6838015 Contacting an etched precision surface with a liquid or supercritical carbon dioxide and an acid having a pKa of less than about 4 under thermodynamic conditions consistent with the retention of said liquid or supercritical CO2
01/04/2005US6838013 Transparent electrodes formed on a substrate by forming a bottom high index layer, a metallic conductive layer, and a top high index layer with a conductivity of at least about 400 Omega /square; and chemically etching the bottom layer
01/04/2005US6838012 Methods for etching dielectric materials
01/04/2005US6838011 Method of processing PFC and apparatus for processing PFC
01/04/2005US6838010 System and method for wafer-based controlled patterning of features with critical dimensions
01/04/2005US6838009 Rework method for finishing metallurgy on chip carriers