Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2005
02/22/2005US6857183 Methods of bonding solder balls to bond pads on a substrate, and bonding frames
02/22/2005US6857182 Mounting system for mounting an electronic component on a substrate
02/22/2005US6857173 Apparatus for and method of manufacturing a semiconductor die carrier
02/22/2005US6857172 Improving the flatness of ferroelectric thin film (<100 nm) by amorphous heating a coating of ferroelectric solution on a semiconductor substrate to coke/desolventize; repeating; crystalizing annealing to form an upper conductive layer
02/22/2005CA2290922C Flow control apparatus for a semiconductor manufacturing wet bench
02/17/2005WO2005015699A1 Two-stage laser pulse energy control device and two-stage laser system
02/17/2005WO2005015653A1 Field effect transistor
02/17/2005WO2005015648A1 Method of forming grating on substrate and iii-nitride semiconductor light emitting device using the substrate
02/17/2005WO2005015647A1 Nitride micro light emitting diode with high brightness and method of manufacturing the same
02/17/2005WO2005015644A1 Body-tied soi transistor and method for fabrication thereof
02/17/2005WO2005015634A1 Method for placing wires on a panel with compensation of positional errors of semiconductor chips in panel component positions
02/17/2005WO2005015631A1 Method for producing thin layers of semiconductor material from a double-sided donor wafer
02/17/2005WO2005015630A1 Electronic part step-processing apparatus, step-processing method, and step-processing program
02/17/2005WO2005015629A1 Method for producing a contact and electronic component comprising said type of contact
02/17/2005WO2005015628A1 Plasma processing device and ashing method
02/17/2005WO2005015627A1 Substrate processing apparatus, substrate processing method, and substrate holding apparatus
02/17/2005WO2005015626A1 Method for producing single crystal ingot from which semiconductor wafer is sliced
02/17/2005WO2005015625A1 Method of processing substrate and substrate processing apparatus
02/17/2005WO2005015624A1 Semiconductor manufacturing equipment
02/17/2005WO2005015623A2 Reduction of defects in conductive layers during electroplating
02/17/2005WO2005015622A1 Film forming method
02/17/2005WO2005015621A1 High-k dielectric film, method of forming the same and related semiconductor device
02/17/2005WO2005015620A1 Heat-treating apparatus
02/17/2005WO2005015619A1 Substrate processing apparatus and method for manufacturing semiconductor device
02/17/2005WO2005015618A1 Substrate for nitride semiconductor growth
02/17/2005WO2005015617A1 Semiconductor layer
02/17/2005WO2005015616A1 Electronic beam exposure device and exposure method
02/17/2005WO2005015615A1 Exposure method and exposure apparatus, stage unit, and device manufacturing method
02/17/2005WO2005015614A1 METHOD OF FABRICATION OF AN FeRAM CAPACITOR, AND AN FeRAM CAPACITOR FORMED BY THE METHOD
02/17/2005WO2005015613A2 Perimeter partition-valve with protected seals
02/17/2005WO2005015612A1 Convertible pad support for receiving at least two pads of different dimensions
02/17/2005WO2005015611A2 Device for stabilising thin discs
02/17/2005WO2005015609A2 Sixsnyge1-x-y and related alloy heterostructures based on si, ge and sn
02/17/2005WO2005015608A2 Method of inhibiting corrosion of copper plated or metallized surfaces and circuitry during semiconductor manufacturing processes
02/17/2005WO2005015488A1 Chip card, chip card module and method for the production of a chip card module
02/17/2005WO2005015317A1 Pattern exposing system and pattern exposing method
02/17/2005WO2005015311A2 Near-field exposure method and apparatus, near-field exposure mask, and device manufacturing method
02/17/2005WO2005015189A2 X-ray fluorescence system with apertured sample mask for analyzing patterned surfaces
02/17/2005WO2005015188A1 Scanning probe inspection apparatus
02/17/2005WO2005014896A1 A method of fabricating an epitaxially grown layer
02/17/2005WO2005014895A1 A method of fabricating an epitaxially grown layer
02/17/2005WO2005014753A1 Non-polymeric organic particles for chemical mechanical planarization
02/17/2005WO2005014746A1 Cmp slurry
02/17/2005WO2005014744A1 Coating composition and low dielectric porous siliceous material produced by using same
02/17/2005WO2005014743A1 Coating composition and low dielectric siliceous material produced by using same
02/17/2005WO2005004206A3 Integrated circuit having pairs of parallel complementary finfets
02/17/2005WO2004107056B1 Compositions suitable for removing photoresist, photoresist byproducts and etching residue, and use thereof
02/17/2005WO2004106584B1 Method and apparatus for generating a precursor for a semiconductor processing system
02/17/2005WO2004105083A3 System and method for forming multi-component dielectric films
02/17/2005WO2004104493A3 Methods of controlling uniformity of substrate temperature and self-contained heating unit and drug-supply unit employing same
02/17/2005WO2004103636A3 Substrate polishing apparatus
02/17/2005WO2004088746A3 Method and apparatus to form a planarized cu interconnect layer using electroless membrane deposition
02/17/2005WO2004084317A3 An optical sub-assembly for a transceiver
02/17/2005WO2004077500A3 A method of fabricating substrateless thin film field-effect devices and an organic thin film transistor obtainable by the method
02/17/2005WO2004073922A3 Abrasives for copper cmp and methods for making
02/17/2005WO2004072323B1 High reflectivity atmospheric pressure furnace for preventing contamination of a work piece
02/17/2005WO2004068545A3 Method and apparatus for the use of self-assembled nanowires for the removal of heat from integrated circuits
02/17/2005WO2004059383A3 Fluoride in supercritical fluid for photoresist and residue removal
02/17/2005WO2004057648A3 Localized reflow for wire bonding and flip chip connections
02/17/2005WO2004051806B1 Flip-chip device having conductive connectors
02/17/2005WO2004051707A3 Gallium nitride-based devices and manufacturing process
02/17/2005WO2004044960A3 Thermal interface composite structure and method of making same
02/17/2005WO2004034459A3 Method for producing a thinned down stack of chips
02/17/2005WO2004034437B1 Improved performance of electronic and optoelectronic devices using a surfactant during epitaxial growth
02/17/2005WO2004030045A8 Semiconductor device processing
02/17/2005WO2003087938A3 Plasma polymerized electron beam resist
02/17/2005WO2003076978A3 Compensator for radially symmetric birefringence
02/17/2005WO2003075099A8 Method and system for overlay measurement
02/17/2005US20050039153 Macro design techniques to accommodate chip level wiring and circuit placement across the macro
02/17/2005US20050039148 Apparatus, method and program for designing semiconductor integrated circuit
02/17/2005US20050038950 Storage device having a probe and a storage cell with moveable parts
02/17/2005US20050038844 Programmable logic device including multipliers and configurations thereof to reduce resource utilization
02/17/2005US20050038686 Method and system to connect consumers to information
02/17/2005US20050038618 Substrate inspecting device, coating/developing device and substrate inspecting method
02/17/2005US20050038554 Inspection and metrology module cluster tool
02/17/2005US20050038546 Remote maintenance method, industrial device, and semiconductor device
02/17/2005US20050038545 Remote maintenance method, industrial device, and semiconductor device
02/17/2005US20050038544 Management system of monitor wafers
02/17/2005US20050038537 Design support system
02/17/2005US20050038220 polysiloxanes having heat and crack resistance, low hygroscopicity, and good receptivity with pore generating materials, used to form interlayers of semiconductors
02/17/2005US20050038216 Silicon-containing polymer, process for its production, resist composition employing it, pattern-forming method and electronic device fabrication method
02/17/2005US20050038180 Adding space grade encapsulant to curing agent, mixing fumed silica therein, then de-airing; for replicating sub-micron feature size patterns
02/17/2005US20050037936 Copper chemical mechanical polishing solutions using sulfonated amphiprotic agents
02/17/2005US20050037698 Carrier head with a flexible membrane
02/17/2005US20050037696 Method and apparatus for forming a planarizing pad having a film and texture elements for planarization of microelectronic substrates
02/17/2005US20050037693 Chemical mechanical polishing aqueous dispersion and chemical mechanical polishing method
02/17/2005US20050037640 Method and apparatus to form a reworkable seal on an electronic module
02/17/2005US20050037639 Electrical connector
02/17/2005US20050037631 Methods of forming silicon quantum dots and methods of fabricating semiconductor memory devices using the same
02/17/2005US20050037630 Post thermal treatment methods of forming high dielectric layers over interfacial layers in integrated circuit devices
02/17/2005US20050037629 Plasma processing method and apparatus
02/17/2005US20050037628 Method for manufacturing display device and display device manufacturing apparatus
02/17/2005US20050037627 Method for depositing silicon nitride films and silicon oxynitride films by chemical vapor deposition
02/17/2005US20050037626 Semiconductor substrate supporting apparatus
02/17/2005US20050037625 Site-specific method for large area uniform thickness plan view transmission electron microscopy sample preparation
02/17/2005US20050037624 Method for plasma etching performance enhancement
02/17/2005US20050037623 Novel resist protect oxide structure of sub-micron salicide process
02/17/2005US20050037622 [method of reworking integrated circuit device]
02/17/2005US20050037621 Etching method for semiconductor device
02/17/2005US20050037620 Method for achieving wafer contact for electro-processing