Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2005
03/01/2005US6861346 Solder ball fabricating process
03/01/2005US6861345 Method of disposing conductive bumps onto a semiconductor device
03/01/2005US6861344 Method of manufacturing a semiconductor integrated circuit device
03/01/2005US6861341 Systems and methods for integration of heterogeneous circuit devices
03/01/2005US6861340 Method of heat-treating nitride compound semiconductor layer and method of producing semiconductor device
03/01/2005US6861339 Method for fabricating laminated silicon gate electrode
03/01/2005US6861338 Thin film transistor and method of manufacturing the same
03/01/2005US6861336 Die thinning methods
03/01/2005US6861335 Method for fabricating a semiconductor device that includes light beam irradiation to separate a semiconductor layer from a single crystal substrate
03/01/2005US6861334 Method of fabricating trench isolation structures for integrated circuits using atomic layer deposition
03/01/2005US6861333 Method of reducing trench aspect ratio
03/01/2005US6861332 Air gap interconnect method
03/01/2005US6861330 Structures and methods for enhancing capacitors in integrated circuits
03/01/2005US6861329 Method of manufacturing capacitor in semiconductor devices
03/01/2005US6861328 Semiconductor device, manufacturing method therefor, and semiconductor manufacturing apparatus
03/01/2005US6861327 Method for manufacturing gate spacer for self-aligned contact
03/01/2005US6861326 Methods of forming semiconductor circuitry
03/01/2005US6861325 Methods for fabricating CMOS-compatible lateral bipolar junction transistors
03/01/2005US6861324 Method of forming a super self-aligned hetero-junction bipolar transistor
03/01/2005US6861323 Method for forming a SiGe heterojunction bipolar transistor having reduced base resistance
03/01/2005US6861322 Method of manufacturing a semiconductor device
03/01/2005US6861321 Method of loading a wafer onto a wafer holder to reduce thermal shock
03/01/2005US6861320 Method of making starting material for chip fabrication comprising a buried silicon nitride layer
03/01/2005US6861319 Gate electrode and method of fabricating the same
03/01/2005US6861318 Semiconductor transistor having a stressed channel
03/01/2005US6861317 Method of making direct contact on gate by using dielectric stop layer
03/01/2005US6861316 Semiconductor device and method for fabricating the same
03/01/2005US6861315 Method of manufacturing an array of bi-directional nonvolatile memory cells
03/01/2005US6861314 Semiconductor memory device utilizing tunnel magneto resistive effects and method for manufacturing the same
03/01/2005US6861313 Semiconductor memory device and fabrication method thereof using damascene bitline process
03/01/2005US6861312 Method for fabricating a trench structure
03/01/2005US6861311 Semiconductor processing methods of forming integrated circuitry, forming conductive lines, forming a conductive grid, forming a conductive network, forming an electrical interconnection to a node location, forming an electrical interconnection with a transistor source/drain region, and integrated circuitry
03/01/2005US6861310 Capacitor having a tantalum lower electrode and method of forming the same
03/01/2005US6861309 Methods of forming spaced conductive regions, and methods of forming capacitor constructions
03/01/2005US6861308 Method for fabrication of SiGe layer having small poly grains and related structure
03/01/2005US6861307 Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same
03/01/2005US6861306 Method of forming a split-gate memory cell with a tip in the middle of the floating gate
03/01/2005US6861305 Methods for fabricating group III nitride compound semiconductors and group III nitride compound semiconductor devices
03/01/2005US6861304 Semiconductor integrated circuit device and method of manufacturing thereof
03/01/2005US6861303 JFET structure for integrated circuit and fabrication method
03/01/2005US6861302 Method of forming a thin film transistor on a transparent plate
03/01/2005US6861301 Method of forming a thin film transistor on a transparent plate
03/01/2005US6861300 Fabricating method of polysilicon thin film transistor having a space and a plurality of channels
03/01/2005US6861299 Process for manufacturing thin film transistor on unannealed glass substrate
03/01/2005US6861298 Method of fabricating CMOS thin film transistor
03/01/2005US6861296 Method for creating thick oxide on the bottom surface of a trench structure in silicon
03/01/2005US6861295 Low-pin-count chip package and manufacturing method thereof
03/01/2005US6861294 Semiconductor devices and methods of making the devices
03/01/2005US6861293 Stacked fin heat sink and method of making
03/01/2005US6861291 Method producing a contact connection between a semiconductor chip and a substrate and the contact connection
03/01/2005US6861290 Flip-chip adaptor package for bare die
03/01/2005US6861285 Flip chip underfill process
03/01/2005US6861284 Semiconductor device and production method thereof
03/01/2005US6861280 Image sensor having micro-lenses with integrated color filter and method of making
03/01/2005US6861279 Method of manufacturing electro-optical device, electro-optical device, and electronic apparatus
03/01/2005US6861278 Method and apparatus for underfilling semiconductor devices
03/01/2005US6861273 Grayscale exposure of curable photoresist with partially removal ofthe uncured material to control the surface roughness for the extreme ultraviolet (EUV) multilayer based diffuser; multilayer relief profiles; semiconductors
03/01/2005US6861271 Forming indium nitride (InN) and indium gallium nitride (InGaN) quantum dots grown by metal-organic-vapor-phase-epitaxy (MOCVD)
03/01/2005US6861270 Method for manufacturing gallium nitride compound semiconductor and light emitting element
03/01/2005US6861269 Electric-circuit fabricating method and system, and electric-circuit fabricating program
03/01/2005US6861268 Method for inspecting silicon wafer, method for manufacturing silicon wafer, method for fabricating semiconductor device, and silicon wafer
03/01/2005US6861204 Design and layout of phase shifting photolithographic masks
03/01/2005US6861198 Negative resist material and pattern formation method using the same
03/01/2005US6861187 Methods and devices for evaluating imaging characteristics of a charged-particle-beam microlithography system
03/01/2005US6861178 Phase shift mask, method of exposure, and method of producing semiconductor device
03/01/2005US6861176 Hole forming by cross-shape image exposure
03/01/2005US6861165 Aluminum nitride sintered compact, ceramic substrate, ceramic heater and electrostatic chuck
03/01/2005US6861158 A silicon wafer has an embedded silicon oxide barrier layer that is resistant to germanium silicide diffusion, minimum crystal defects; semiconductors
03/01/2005US6861138 Electrically conductive, thermoplastic, heat-activated adhesive film
03/01/2005US6861130 Sintered polycrystalline gallium nitride and its production
03/01/2005US6861104 Method of enhancing adhesion strength of BSG film to silicon nitride film
03/01/2005US6861103 Synthesis of functional polymers and block copolymers on silicon oxide surfaces by nitroxide-mediated living free radical polymerization in vapor phase
03/01/2005US6861095 Method of uniformly applying a paste on a paste applying body
03/01/2005US6861030 Method of manufacturing high purity zirconium and hafnium
03/01/2005US6861027 Method and apparatus for processing a microelectronic workpiece including an apparatus and method for executing a processing step at an elevated temperature
03/01/2005US6861013 Die-attaching paste and semiconductor device
03/01/2005US6861010 Copper-based metal polishing composition, method for manufacturing a semiconductor device, polishing composition, aluminum-based metal polishing composition, and tungsten-based metal polishing composition
03/01/2005US6860975 Barrier layer and method of depositing a barrier layer
03/01/2005US6860965 High throughput architecture for semiconductor processing
03/01/2005US6860964 Etch/strip apparatus integrated with cleaning equipment
03/01/2005US6860963 Sample separating apparatus and method, and substrate manufacturing method
03/01/2005US6860945 Substrate coating unit and substrate coating method
03/01/2005US6860944 Microelectronic fabrication system components and method for processing a wafer using such components
03/01/2005US6860943 Method for producing group III nitride compound semiconductor
03/01/2005US6860939 Semiconductor crystal-structure-processed mechanical devices, and methods and systems for making
03/01/2005US6860801 Pedestal of a load-cup which supports wafers loaded/unloaded onto/from a chemical mechanical polishing apparatus
03/01/2005US6860793 Window portion with an adjusted rate of wear
03/01/2005US6860790 Buffer system for a wafer handling system
03/01/2005US6860731 Mold for encapsulating a semiconductor chip
03/01/2005US6860711 Semiconductor-manufacturing device having buffer mechanism and method for buffering semiconductor wafers
03/01/2005US6860710 Lifting mechanism for integrated circuit fabrication systems
03/01/2005US6860634 Temperature measuring method, heat treating device and method, computer program, and radiation thermometer
03/01/2005US6860610 Reflection type projection optical system, exposure apparatus and device fabrication method using the same
03/01/2005US6860533 Substrate loading/unloading apparatus for manufacturing a liquid crystal display device
03/01/2005US6860279 Pressurized liquid diffuser
03/01/2005US6860277 Single type of semiconductor wafer cleaning device
03/01/2005US6860275 Post etching treatment process for high density oxide etcher
03/01/2005US6860027 Wafer alignment device
03/01/2005US6859984 Method for providing a matrix array ultrasonic transducer with an integrated interconnection means
02/2005
02/25/2005CA2478577A1 Integrated printed circuit board and test contactor for high speed semiconductor testing
1 ... 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 ... 6590