Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2005
02/22/2005US6859352 Capacitor sheet
02/22/2005US6859337 Optical-element mountings exhibiting reduced deformation of optical elements held thereby
02/22/2005US6859265 Stage device, method of controlling same, and exposure apparatus
02/22/2005US6859264 Projection exposure apparatus having aberration measurement device
02/22/2005US6859260 Method and system for improving focus accuracy in a lithography system
02/22/2005US6859259 Lithographic projection apparatus and reflector assembly for use therein
02/22/2005US6859257 Stage system
02/22/2005US6859252 Active matrix substrate and manufacturing method thereof
02/22/2005US6859223 Pattern writing apparatus and pattern writing method
02/22/2005US6859088 Ferroelectric element and a ferroelectric gate device using the same
02/22/2005US6859087 Half-bridge high voltage gate driver providing protection of a transistor
02/22/2005US6859079 Semiconductor device capable of accurately producing internal multi-phase clock signal
02/22/2005US6859070 Semiconductor integrated circuit device having flip-flops that can be reset easily
02/22/2005US6859067 Semiconductor apparatus
02/22/2005US6859061 Device for analyzing failure in semiconductor device provided with internal voltage generating circuit
02/22/2005US6859060 Inspection method of semiconductor device and inspection system
02/22/2005US6859059 Systems and methods for testing receiver terminations in integrated circuits
02/22/2005US6859031 Apparatus and method for dynamic diagnostic testing of integrated circuits
02/22/2005US6859023 Evaluation method for evaluating insulating film, evaluation device therefor and method for manufacturing evaluation device
02/22/2005US6858949 Semiconductor memory device and method for arranging memory cells
02/22/2005US6858948 Substrate provided with an alignment mark in a substantially transmissive process layer, mask for exposing said mark, device manufacturing method, and device manufactured thereby
02/22/2005US6858946 Semiconductor device
02/22/2005US6858942 Semiconductor package with improved thermal cycling performance, and method of forming same
02/22/2005US6858941 Multi-chip stack and method of fabrication utilizing self-aligning electrical contact array
02/22/2005US6858937 Backend metallization method and device obtained therefrom
02/22/2005US6858936 Semiconductor device having an improved construction in the interlayer insulating film
02/22/2005US6858934 Semiconductor device structures including metal silicide interconnect structures that extend at least partially over transistor gate structures and methods for making the same
02/22/2005US6858933 Wherein transverse surface of chip insert has roughness chosen such that face of block of encapsulation material of semiconductor package has a suitable roughness in the region of the face of the block of encapsulation
02/22/2005US6858931 Heat sink with collapse structure for semiconductor package
02/22/2005US6858927 Semiconductor packages and methods for making the same
02/22/2005US6858924 Flip-chip semiconductor device having I/O modules in an internal circuit area
02/22/2005US6858923 Post-deposition treatment to enhance properties of Si-O-C low films
02/22/2005US6858919 Semiconductor package
02/22/2005US6858918 Semiconductor device including a capacitance
02/22/2005US6858916 Semiconductor memory device with series-connected antifuse-components
02/22/2005US6858914 Semiconductor device with fuses
02/22/2005US6858910 A plastic land-grid array package, a ball-grid array package, and a plastic leaded package or micromechanical components are fabricated
02/22/2005US6858909 CMP assisted liftoff micropatterning
02/22/2005US6858908 Complementary transistors having respective gates formed from a metal and a corresponding metal-silicide
02/22/2005US6858907 Method of fabricating semiconductor device having notched gate
02/22/2005US6858906 Floating trap non-volatile semiconductor memory devices including high dielectric constant blocking insulating layers
02/22/2005US6858905 Methods of manufacturing low cross-talk electrically programmable resistance cross point memory structures
02/22/2005US6858904 Integrated circuit made by silicon-doping of chemical vapor deposited titanium, with silane gas during deposition, reduces consumption of substrate silicon during the siliciding reaction
02/22/2005US6858903 MOSFET device with in-situ doped, raised source and drain structures
02/22/2005US6858899 Thin film transistor with metal oxide layer and method of making same
02/22/2005US6858898 Semiconductor device and method for manufacturing the same
02/22/2005US6858897 Individually adjustable back-bias technique
02/22/2005US6858896 Insulated gate type semiconductor device and method for fabricating the same
02/22/2005US6858894 Comprising agglomerates of one or more noble metals
02/22/2005US6858893 Semiconductor memory having a pillar type trench dram cell
02/22/2005US6858891 Nanotube semiconductor devices and methods for making the same
02/22/2005US6858890 Ferroelectric memory integrated circuit with improved reliability
02/22/2005US6858889 Polysilicon capacitor having large capacitance and low resistance
02/22/2005US6858887 BJT device configuration and fabrication method with reduced emitter width
02/22/2005US6858885 Semiconductor apparatus and protection circuit
02/22/2005US6858877 Nitride semiconductor, method for manufacturing the same and nitride semiconductor device
02/22/2005US6858872 Optical interconnection integrated circuit, method of manufacturing optical interconnection integrated circuit, electro-optical apparatus, and electronic apparatus
02/22/2005US6858867 Channel-etch thin film transistor
02/22/2005US6858866 III-nitride light emitting diode
02/22/2005US6858865 Doped aluminum oxide dielectrics
02/22/2005US6858854 Method and apparatus for measuring inclination angle of ion beam
02/22/2005US6858838 Neutral particle beam processing apparatus
02/22/2005US6858800 Electronic part with a lead frame
02/22/2005US6858799 Electronic component with a semiconductor chip and method of producing the electronic component
02/22/2005US6858697 Providing a neutral to weakly acidic polymerization inhibitor; used in a chemical vapor deposition process for silicon oxides in electronic material fabrication
02/22/2005US6858549 Method for forming wiring structure
02/22/2005US6858548 Application of carbon doped silicon oxide film to flat panel industry
02/22/2005US6858547 System and method for forming a gate dielectric
02/22/2005US6858546 Method of depositing rare earth oxide thin films
02/22/2005US6858544 Method for forming bit line of semiconductor device
02/22/2005US6858543 Method of forming tunnel oxide film in semiconductor device
02/22/2005US6858542 Semiconductor fabrication method for making small features
02/22/2005US6858541 Etch stop control for MEMS device formation
02/22/2005US6858540 Selective removal of tantalum-containing barrier layer during metal CMP
02/22/2005US6858539 Post-CMP treating liquid and method for manufacturing semiconductor device
02/22/2005US6858538 Methods and apparatuses for monitoring and controlling mechanical or chemical-mechanical planarization of microelectronic substrate assemblies
02/22/2005US6858537 Process for smoothing a rough surface on a substrate by dry etching
02/22/2005US6858536 Processes to form a metallic film stack
02/22/2005US6858535 Methods for patterning metal layers for use with forming semiconductor devices
02/22/2005US6858534 Method of manufacturing a multilayered doped conductor for a contact in an integrated device
02/22/2005US6858533 Semiconductor device having an etch stopper formed of a sin layer by low temperature ALD and method of fabricating the same
02/22/2005US6858532 Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related tooling
02/22/2005US6858531 Electro chemical mechanical polishing method
02/22/2005US6858529 Methods of forming contact plugs including polysilicon doped with an impurity having a lesser diffusion coefficient than phosphorus
02/22/2005US6858528 Composite sacrificial material
02/22/2005US6858527 Method to increase electromigration resistance of copper using self-assembled organic thiolate monolayers
02/22/2005US6858526 Methods of forming materials between conductive electrical components, and insulating materials
02/22/2005US6858525 Stacked local interconnect structure and method of fabricating same
02/22/2005US6858524 Method of depositing barrier layer for metal gates
02/22/2005US6858523 Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride
02/22/2005US6858522 Electrical contact for compound semiconductor device and method for forming same
02/22/2005US6858521 Method for fabricating spaced-apart nanostructures
02/22/2005US6858520 Method of manufacturing semiconductor device
02/22/2005US6858518 Method for manufacturing semiconductor integrated circuit
02/22/2005US6858517 Methods of producing a heterogeneous semiconductor structure
02/22/2005US6858516 Manufacturing method of a high aspect ratio shallow trench isolation region
02/22/2005US6858515 Process for producing semiconductor device and semiconductor device produced thereby
02/22/2005US6858514 Low power flash memory cell and method
02/22/2005US6858512 Semiconductor device and method of producing the same
02/22/2005US6858511 Method of semiconductor via testing
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