| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 02/24/2005 | WO2005018008A1 Semiconductor device |
| 02/24/2005 | WO2005018007A1 Back-contacted solar cells with integral conductive vias and method of making |
| 02/24/2005 | WO2005018006A1 Array board, liquid crystal display and method for producing array board |
| 02/24/2005 | WO2005018005A1 Semiconductor device including mosfet having band-engineered superlattice |
| 02/24/2005 | WO2005018004A1 Method for making semiconductor device including band-engineered superlattice |
| 02/24/2005 | WO2005017999A1 Semiconductor device and method for making the same |
| 02/24/2005 | WO2005017995A1 Process for fabricating electronic components using liquid injection molding |
| 02/24/2005 | WO2005017994A1 Integrated circuit package for semiconductor devices with improved electric resistance and inductance |
| 02/24/2005 | WO2005017993A1 Method for asymmetric sidewall spacer formation |
| 02/24/2005 | WO2005017992A1 Field effect transistor having a doped gate electrode with reduced gate depletion and method of forming the transistor |
| 02/24/2005 | WO2005017991A1 Semiconductor device, method for manufacturing semiconductor device and gas for plasma cvd |
| 02/24/2005 | WO2005017990A1 Method for forming film, method for manufacturing semiconductor device, semiconductor device and substrate treatment system |
| 02/24/2005 | WO2005017989A1 Abrasive compound for semiconductor planarization |
| 02/24/2005 | WO2005017988A1 Substrate processing apparatus and method for manufacturing semiconductor device |
| 02/24/2005 | WO2005017987A1 Substrate treatment appratus and method of manufacturing semiconductor device |
| 02/24/2005 | WO2005017986A1 Silicon carbide epitaxial wafer, method for producing such wafer, and semiconductor device formed on such wafer |
| 02/24/2005 | WO2005017984A1 Substrate holding structure and substrate processing device |
| 02/24/2005 | WO2005017983A2 Plasma ashing process |
| 02/24/2005 | WO2005017981A2 Dynamic metrology sampling methods |
| 02/24/2005 | WO2005017980A1 Methods and apparatus for processing semiconductor devices by gas annealing |
| 02/24/2005 | WO2005017976A2 Device threshold control of front-gate silicon-on-insulator mosfet using a self-aligned back-gate |
| 02/24/2005 | WO2005017975A2 Anchors for microelectromechanical systems having an soi substrate, and method of fabricating same |
| 02/24/2005 | WO2005017974A2 Improved integrated circuit substrate material and method |
| 02/24/2005 | WO2005017972A2 Method for microfabricating structures using silicon-on-insulator material |
| 02/24/2005 | WO2005017967A2 Nanotube device structure and methods of fabrication |
| 02/24/2005 | WO2005017964A2 Structure and method of making strained semiconductor cmos transistors having lattice-mismatched source and drain regions |
| 02/24/2005 | WO2005017963A2 Surface preparation prior to deposition on germanium |
| 02/24/2005 | WO2005017962A2 System and process for producing nanowire composites and electronic substrates therefrom |
| 02/24/2005 | WO2005017961A2 Plasma etching using dibromomethane addition |
| 02/24/2005 | WO2005017957A2 Nanowire array and nanowire solar cells and methods for forming the same |
| 02/24/2005 | WO2005017951A2 Quantum dots, nanocomposite materials with quantum dots, optical devices with quantum dots, and related fabrication methods |
| 02/24/2005 | WO2005017949A2 Method for high-resolution processing of thin layers with electron beams |
| 02/24/2005 | WO2005017937A2 Sensor array for measuring plasma characteristics in plasma processing enviroments |
| 02/24/2005 | WO2005017621A1 Method of producing phase shift masks |
| 02/24/2005 | WO2005017483A1 Illuminant distribution evaluating method, optical member manufacturing method, illumination optical device, exposure apparatus, and exposure method |
| 02/24/2005 | WO2005017230A1 Etching solution for titanium-containing layer and method for etching titanium-containing layer |
| 02/24/2005 | WO2005016982A1 Resin for resist, positive resist composition, and method of forming resist pattern |
| 02/24/2005 | WO2005016822A1 Silica and silica-based slurry |
| 02/24/2005 | WO2005016595A1 Grinding apparatus, semiconductor device producing method using the same, and semiconductor device produced by the method |
| 02/24/2005 | WO2005016563A1 Methods of thinning a silicon wafer using hf and ozone |
| 02/24/2005 | WO2005016017A1 Emulsions |
| 02/24/2005 | WO2005001909A3 Method for efficiently producing removable peripheral cards |
| 02/24/2005 | WO2004113041A3 Method for producing a ceramic/metal substrate |
| 02/24/2005 | WO2004112105A3 Multi-step chemical mechanical polishing of a gate area in a finfet |
| 02/24/2005 | WO2004112102A3 Method for forming a sgoi by annealing near the sige alloy melting point |
| 02/24/2005 | WO2004101855A3 Electrochemical fabrication methods including use of surface treatments to reduce overplating and/or planarization during formation of multi-layer three-dimensional structures |
| 02/24/2005 | WO2004100290A3 Multi-height finfets |
| 02/24/2005 | WO2004099466A3 Method for electroless deposition of phosphorus-containing metal films onto copper with palladium-free activation |
| 02/24/2005 | WO2004093162A3 Silicon substrate comprising positive etching profiles with a defined slope angle, and production method |
| 02/24/2005 | WO2004081984A3 Two-step post nitridation annealing for lower eot plasma nitrided gate dielectrics |
| 02/24/2005 | WO2004070769A3 Method for producing a chip panel by means of a heating and pressing process using a thermoplastic material |
| 02/24/2005 | WO2004055872A3 Columnar structured material and method of manufacturing the same |
| 02/24/2005 | WO2004051745A3 Electronic component comprising a plurality of chips and method for producing the same |
| 02/24/2005 | WO2004051737A3 Split manufacturing method for semiconductor circuits |
| 02/24/2005 | WO2004049451A3 Boron phosphide-based compound semiconductor device, production method thereof and light-emitting diode |
| 02/24/2005 | WO2004033103A3 High temperature, high strength, colorable materials for device processing systems |
| 02/24/2005 | WO2003085709A9 Reflection type mask blank and reflection type mask and production methods for them |
| 02/24/2005 | WO2003079420A8 Evaporation source for deposition process and insulation fixing plate, and heating wire winding plate and method for fixing heating wire |
| 02/24/2005 | WO2003054928A3 Porous low-k dielectric interconnect structures |
| 02/24/2005 | US20050044522 Layout method of semiconductor integrated circuit, layout structure thereof, and photomask for forming the layout structure |
| 02/24/2005 | US20050044515 Method for determining and using leakage current sensitivities to optimize the design of an integrated circuit |
| 02/24/2005 | US20050044461 Semiconductor device test circuit and semiconductor device |
| 02/24/2005 | US20050043912 Memory testing apparatus and method |
| 02/24/2005 | US20050043903 Circuit-pattern inspection apparatus |
| 02/24/2005 | US20050043839 Manufacturing process developing method |
| 02/24/2005 | US20050043834 Method of adaptive interactive learning control and a lithographic manufacturing process and apparatus employing such a method |
| 02/24/2005 | US20050043186 Method for forming pattern and drop discharge apparatus |
| 02/24/2005 | US20050042890 Method of forming a substantially closed void |
| 02/24/2005 | US20050042889 Bi-layer approach for a hermetic low dielectric constant layer for barrier applications |
| 02/24/2005 | US20050042888 Precursor compositions and processes for MOCVD of barrier materials in semiconductor manufacturing |
| 02/24/2005 | US20050042887 Diffusion barrier |
| 02/24/2005 | US20050042886 System for ultraviolet atmospheric seed layer remediation |
| 02/24/2005 | US20050042885 Methods of reducing plasma-induced damage for advanced plasma CVD dielectrics |
| 02/24/2005 | US20050042884 Method of forming silicon-containing insulation film having low dielectric constant and low film stress |
| 02/24/2005 | US20050042883 Method of forming low-k films |
| 02/24/2005 | US20050042882 Method of etching metallic thin film on thin film resistor |
| 02/24/2005 | US20050042881 Processing apparatus |
| 02/24/2005 | US20050042880 Multilayered CMP stop for flat planarization |
| 02/24/2005 | US20050042879 Masking methods |
| 02/24/2005 | US20050042878 Semiconductor devices having a via hole and methods for forming a via hole in a semiconductor device |
| 02/24/2005 | US20050042877 Carbonation of pH controlled KOH solution for improved polishing of oxide films on semiconductor wafers |
| 02/24/2005 | US20050042876 Method of etching and etching apparatus |
| 02/24/2005 | US20050042874 Removing sacrificial material by thermal decomposition |
| 02/24/2005 | US20050042873 Method and system to provide electroplanarization of a workpiece with a conducting material layer |
| 02/24/2005 | US20050042872 Process for forming lead-free bump on electronic component |
| 02/24/2005 | US20050042871 Multi-layer hard mask structure for etching deep trench in substrate |
| 02/24/2005 | US20050042870 Method for producing a layer on a substrate |
| 02/24/2005 | US20050042869 Substrate processing method and substrate processing apparatus |
| 02/24/2005 | US20050042868 Method for forming plating film |
| 02/24/2005 | US20050042867 Semiconductor device having electrical contact from opposite sides |
| 02/24/2005 | US20050042865 Atomic layer deposition of metallic contacts, gates and diffusion barriers |
| 02/24/2005 | US20050042864 Ohmic contact structure and method for the production of the same |
| 02/24/2005 | US20050042862 Small electrode for chalcogenide memories |
| 02/24/2005 | US20050042861 Method and apparatus to form a planarized Cu interconnect layer using electroless membrane deposition |
| 02/24/2005 | US20050042860 Method for eliminating reaction between photoresist and OSG |
| 02/24/2005 | US20050042859 Etching process for high-k gate dielectrics |
| 02/24/2005 | US20050042858 Method of improving stability in low k barrier layers |
| 02/24/2005 | US20050042857 Localized slots for stress relieve in copper |
| 02/24/2005 | US20050042856 Programmed material consolidation processes for protecting intermediate conductive structures |
| 02/24/2005 | US20050042855 Wire bonding for thin semiconductor package |