Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2005
02/15/2005US6855577 Semiconductor devices having different package sizes made by using common parts
02/15/2005US6855576 Method for cleaning a ceramic member for use in a system for producing semiconductors, a cleaning agent and a combination of cleaning agents
02/15/2005US6855575 Semiconductor chip package having a semiconductor chip with center and edge bonding pads and manufacturing method thereof
02/15/2005US6855574 Stress balanced semiconductor packages, method of fabrication and modified mold segment
02/15/2005US6855573 Integrated circuit package and manufacturing method therefor with unique interconnector
02/15/2005US6855572 Castellation wafer level packaging of integrated circuit chips
02/15/2005US6855571 Method of producing GaN-based semiconductor laser device and semiconductor substrate used therefor
02/15/2005US6855567 Etch endpoint detection
02/15/2005US6855565 Semiconductor device having ferroelectric film and manufacturing method thereof
02/15/2005US6855564 Magnetic random access memory having transistor of vertical structure with writing line formed on an upper portion of the magnetic tunnel junction cell
02/15/2005US6855563 Method of manufacturing a tunnel magneto-resistance based magnetic memory device
02/15/2005US6855486 Lithographic method and apparatus
02/15/2005US6855485 Prebaking photoresist film; exposure to ultraviolet radiation through photomask in vacuum; development
02/15/2005US6855484 Method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an
02/15/2005US6855481 Apparatus and a method for forming a pattern using a crystal structure of material
02/15/2005US6855475 Photoresist composition
02/15/2005US6855466 Planarizing antireflective coating compositions
02/15/2005US6855464 Fast and flexible method and system for grating overlay patterns, semiconductors
02/15/2005US6855463 Photomask having an intermediate inspection film layer
02/15/2005US6855436 Thin, high-quality, substantially relaxed SiGe-on-insulator substrate materials which can then be used as lattice mismatched templates, i.e., substrates, for forming strained Si layers.
02/15/2005US6855418 Tape for forming resin tie bar, resin tie bar, lead frame equipped with resin tie bar, resin-molded semiconductor device, and method for producing same
02/15/2005US6855380 Method for the production of optical components with increased stability, components obtained thereby and their use
02/15/2005US6855378 Printing of electronic circuits and components
02/15/2005US6855377 Deposited film forming apparatus and deposited film forming method
02/15/2005US6855370 Fluoropolymer interlayer dielectric by chemical vapor deposition
02/15/2005US6855368 Chemisorbing alternating monolayers of two compounds with a carrier gas to control a quantity of the fluorine atoms associated with the monolayer
02/15/2005US6855367 Method of producing electronic parts, and member for production thereof
02/15/2005US6855267 For horizontally planarizing various kinds of layers, such as oxide layers, nitride layers, metal layers during manufacturing of semiconductor devices
02/15/2005US6855266 Liquid carrier, oxidizing agent, carboxylic acid that increases the polishing rate, a polyethylenimine, and a polishing pad and/or an abrasive.
02/15/2005US6855207 Apparatus and system for eliminating contaminants on a substrate surface
02/15/2005US6855203 Preparation of 157nm transmitting barium fluoride crystals with permeable graphite
02/15/2005US6855043 Carrier head with a modified flexible membrane
02/15/2005US6855037 Method of sealing wafer backside for full-face electrochemical plating
02/15/2005US6855035 Apparatus and method for producing substrate with electrical wire thereon
02/15/2005US6855034 Polishing pad for semiconductor wafer and laminated body for polishing of semiconductor wafer equipped with the same as well as method for polishing of semiconductor wafer
02/15/2005US6855030 Modular method for chemical mechanical planarization
02/15/2005US6854980 Probe card
02/15/2005US6854948 Stage with two substrate buffer station
02/15/2005US6854671 Nozzle for ejecting molten metal
02/15/2005US6854636 Structure and method for lead free solder electronic package interconnections
02/15/2005US6854633 Flux includes a dielectric resin such as an epoxy resin, a silicone resin, natural or synthetic rubber that cures to form polymer support members; fluxing agent such as an organic acid for removing oxides from the contact pads
02/15/2005US6854583 Conveyorized storage and transportation system
02/15/2005US6854514 Temperature control apparatus and method with recirculated coolant
02/15/2005US6854484 Valve for a slurry outlet opening of a chemical mechanical polishing device and chemical mechanical polishing device having a valve
02/15/2005US6854473 Method and apparatus for executing plural processes on a microelectronic workpiece at a single processing station
02/15/2005US6854181 Folded-fin heat sink assembly and method of manufacturing same
02/15/2005US6854179 Modification of circuit features that are interior to a packaged integrated circuit
02/10/2005WO2005013379A2 Method for the production of a plurality of opto-electronic semiconductor chips and opto-electronic semiconductor chip
02/10/2005WO2005013375A1 Semiconductor device and its manufacturing method
02/10/2005WO2005013374A1 Semiconductor device and method for manufacturing semiconductor device
02/10/2005WO2005013373A1 Eeprom with multi-member floating gate
02/10/2005WO2005013372A2 Spin injection devices
02/10/2005WO2005013371A2 Semiconductor device including band-engineered superlattice
02/10/2005WO2005013368A1 Semiconductor device
02/10/2005WO2005013363A2 Circuit arrangement placed on a substrate and method for producing the same
02/10/2005WO2005013358A2 Arrangement of an electrical component placed on a substrate, and method for producing the same
02/10/2005WO2005013357A1 Method of manufacturing multi-level contacts by sizing of contact sizes in integrated circuits
02/10/2005WO2005013356A1 Semiconductor device having trench wiring and process for fabricating semiconductor device
02/10/2005WO2005013355A1 Method of detaching a semiconductor layer
02/10/2005WO2005013354A1 Work transfer means, image recognition device, and positioning method
02/10/2005WO2005013353A2 Method for producing reduced-thickness electronic components
02/10/2005WO2005013352A2 Method for the production of a semiconductor element with a plastic housing and support plate for carrying out said method
02/10/2005WO2005013351A1 Method for recognizing work in die bonder and die bonder
02/10/2005WO2005013350A1 Method of manufacturing a semiconductor device with a bipolar transistor and device with a bipolar transistor
02/10/2005WO2005013349A2 Controlled growth of highly uniform, oxide layers, especially ultrathin layers
02/10/2005WO2005013348A2 Formation of ultra-thin oxide and oxynitride layers by self-limiting interfacial oxidation
02/10/2005WO2005013347A2 Precise patterning of high-k films
02/10/2005WO2005013346A1 Method and apparatus for etching disk-like member
02/10/2005WO2005013345A1 Substrate-treating apparatus
02/10/2005WO2005013344A1 Method for slowing down dopand diffusion in semiconductor substrates and devices fabricated therefrom
02/10/2005WO2005013343A1 Vapor deposition apparatus and vapor deposition method
02/10/2005WO2005013342A1 Resist removing apparatus
02/10/2005WO2005013340A1 Eddy current system for in-situ profile measurement
02/10/2005WO2005013339A2 Methods of forming conductive structures including titanium-tungsten base layers and related structures
02/10/2005WO2005013338A2 Production of a structure comprising a protective layer against chemical treatment
02/10/2005WO2005013335A2 Method of depositing patterned films of materials using a positive imaging process
02/10/2005WO2005013334A2 Holder for supporting wafers during semiconductor manufacture
02/10/2005WO2005013331A2 Supercritical fluid-assisted deposition of materials on semiconductor substrates
02/10/2005WO2005013330A2 Crack stop for low k dielectrics
02/10/2005WO2005013326A2 Epitaxial growth of relaxed silicon germanium layers
02/10/2005WO2005013325A2 System for processing a treatment object
02/10/2005WO2005013323A2 Methods and apparatus for fabricating solar cells
02/10/2005WO2005013320A2 A semiconductor device having an organic anti-reflective coating (arc) and method therefor
02/10/2005WO2005013319A2 Semiconductor device with strain relieving bump design
02/10/2005WO2005013318A2 Method for obtaining a thin high-quality layer by co-implantation and thermal annealing
02/10/2005WO2005013317A2 Stressed semiconductor-on-insulator structure resistant to high-temperature stress
02/10/2005WO2005013316A2 Method for the production of a plurality of opto-electronic semiconductor chips and opto-electronic semiconductor chip
02/10/2005WO2005013282A1 Wordline latching in semiconductor memories
02/10/2005WO2005013281A2 Nonvolatile memory and method of making same
02/10/2005WO2005013026A1 Device for feeding gas to chamber and method for controlling chamber inner pressure using the device
02/10/2005WO2005013011A1 Material for thickening resist pattern, method for producing resist pattern using same, and method for manufacturing semiconductor device
02/10/2005WO2005013005A1 Pattern drawing method and pattern drawing device
02/10/2005WO2005013002A2 Process sequence for photoresist stripping and/or cleaning of photomasks for integrated circuit manufacturing
02/10/2005WO2005012600A1 Electrolytic processing apparatus and electrolytic processing method
02/10/2005WO2005012451A2 Slurries and methods for chemical-mechanical planarization of copper
02/10/2005WO2005012144A1 Work carrying equipment and die bonder using the equipment
02/10/2005WO2005011927A1 Work transfer means
02/10/2005WO2005011908A1 Method for producing connections in a micro electronics system
02/10/2005WO2005006419A3 Substrate assembly for stressed systems
02/10/2005WO2004114395A3 Dual damascene interconnect structures having different materials for line and via conductors