Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2005
02/22/2005US6858510 Low-voltage punch-through bi-directional transient-voltage suppression devices having surface breakdown protection and methods of making the same
02/22/2005US6858509 Bipolar transistor with upper heterojunction collector and method for making same
02/22/2005US6858508 SOI annealing method
02/22/2005US6858507 Graded LDD implant process for sub-half-micron MOS devices
02/22/2005US6858506 Method for fabricating locally strained channel
02/22/2005US6858505 Methods of forming transistor structures including separate anti-punchthrough layers
02/22/2005US6858504 Method for forming gate segments for an integrated circuit
02/22/2005US6858503 Depletion to avoid cross contamination
02/22/2005US6858502 High speed composite p-channel Si/SiGe heterostructure for field effect devices
02/22/2005US6858501 Self-aligned dual-floating gate memory cell and method for manufacturing the same
02/22/2005US6858500 Semiconductor device and its manufacturing method
02/22/2005US6858499 Method for fabrication of MOSFET with buried gate
02/22/2005US6858498 Method for manufacturing memory
02/22/2005US6858497 Non-volatile semiconductor memory device and a method of producing the same
02/22/2005US6858496 Oxidizing pretreatment of ONO layer for flash memory
02/22/2005US6858495 Multi-bit memory unit and fabrication method thereof
02/22/2005US6858494 Structure and fabricating method with self-aligned bit line contact to word line in split gate flash
02/22/2005US6858493 Method of forming a dual-sided capacitor
02/22/2005US6858492 Method for fabricating a semiconductor memory device
02/22/2005US6858491 Method of manufacturing the semiconductor device having a capacitor formed in SOI substrate
02/22/2005US6858490 Method for manufacturing merged DRAM with logic device
02/22/2005US6858489 Semiconductor device manufacturing method
02/22/2005US6858488 CMOS performance enhancement using localized voids and extended defects
02/22/2005US6858487 Method of manufacturing a semiconductor device
02/22/2005US6858486 Vertical bipolar transistor formed using CMOS processes
02/22/2005US6858485 Method for creation of a very narrow emitter feature
02/22/2005US6858484 Method of fabricating semiconductor integrated circuit device
02/22/2005US6858483 Integrating n-type and p-type metal gate transistors
02/22/2005US6858482 Method of manufacture of programmable switching circuits and memory cells employing a glass layer
02/22/2005US6858480 Method of manufacturing semiconductor device
02/22/2005US6858479 Low resistivity copper conductor line, liquid crystal display device having the same and method for forming the same
02/22/2005US6858478 Tri-gate devices and methods of fabrication
02/22/2005US6858477 Thin film transistors
02/22/2005US6858475 Method of forming an integrated circuit substrate
02/22/2005US6858474 Wire bond package and packaging method
02/22/2005US6858473 Method for manufacturing semiconductor device, adhesive sheet for use therein and semiconductor device
02/22/2005US6858471 Semiconductor substrate with trenches for reducing substrate resistance
02/22/2005US6858470 Method for fabricating semiconductor packages, and leadframe assemblies for the fabrication thereof
02/22/2005US6858469 Method and apparatus for epoxy loc die attachment
02/22/2005US6858466 System and a method for fluid filling wafer level packages
02/22/2005US6858461 Partially transparent photovoltaic modules
02/22/2005US6858460 Retrograde well structure for a CMOS imager
02/22/2005US6858459 Method of fabricating micro-mirror switching device
02/22/2005US6858452 Method for isolating self-aligned contact pads
02/22/2005US6858451 Method for manufacturing a dynamic quantity detection device
02/22/2005US6858447 Method for testing semiconductor chips
02/22/2005US6858446 Plasma monitoring method and semiconductor production apparatus
02/22/2005US6858445 Method for adjusting the overlay of two mask planes in a photolithographic process for the production of an integrated circuit
02/22/2005US6858444 Method for making a ferroelectric memory transistor
02/22/2005US6858443 Methods of forming ferroelectric capacitors on protruding portions of conductive plugs having a smaller cross-sectional size than base portions thereof
02/22/2005US6858442 Ferroelectric memory integrated circuit with improved reliability
02/22/2005US6858379 Photoresist compositions for short wavelength imaging
02/22/2005US6858377 Dual damascene process using a single photo mask
02/22/2005US6858376 Process for structuring a photoresist layer on a semiconductor substrate
02/22/2005US6858375 Method for forming resist pattern
02/22/2005US6858371 Maleimide-photoresist monomers containing halogen, polymers thereof and photoresist compositions comprising the same
02/22/2005US6858361 Controlling critical dimensions (CDs) of features formed on the semiconductor substrate through feedback and fee-forward of information gathering during in-process inspection of the feature
02/22/2005US6858354 Method to prevent side lobe on seal ring
02/22/2005US6858308 Semiconductor element, and method of forming silicon-based film
02/22/2005US6858265 Technique for improving chucking reproducibility
02/22/2005US6858251 Lanthanum complex and process for the preparation of a BLT layer using same
02/22/2005US6858154 Thermoelectric material and method of manufacturing the same
02/22/2005US6858153 Integrated low K dielectrics and etch stops
02/22/2005US6858124 Electrochemical mechanical deposition comprising a perfluorinated sulfonic acid compounds solution, controlling the etching and dissolving copper from copper foil, electrodepositing copper on connector
02/22/2005US6858123 An electroplating solution comprising copper sulfate, sulfuric acid, hydrochloride, an ethylene oxide adduct or polyethylene glycol, hydroxylamine sulfate, and hydroxyl amine chloride; making semiconductors
02/22/2005US6858121 Method and apparatus for filling low aspect ratio cavities with conductive material at high rate
02/22/2005US6858118 Apparatus for enhancing the lifetime of stencil masks
02/22/2005US6858112 Process depending on plasma discharges sustained by inductive coupling
02/22/2005US6858111 Conductive polymer interconnection configurations
02/22/2005US6858094 High resistivity and high gettering ability; DZ-IG wafer that can serve as an alternative of SOI wafer for mobile communications
02/22/2005US6858092 Device and process for liquid treatment of wafer-shaped articles
02/22/2005US6858091 Applying a cleaning chemistry containing corrosion inhibitors to a surface of a wafer for a period of time, refreshing a concentration gradient, and applying rinsing and drying agents
02/22/2005US6858089 Forming a sacrificial film on the surface of the wafer and then removing it by supercritical fluid cleaning
02/22/2005US6858088 Method and apparatus for treating substrates
02/22/2005US6858087 Vacuum-processing method using a movable cooling plate during processing
02/22/2005US6858085 Two-compartment chamber for sequential processing
02/22/2005US6858084 Plating apparatus and method
02/22/2005US6858081 Selective growth method, and semiconductor light emitting device and fabrication method thereof
02/22/2005US6858077 Single crystalline silicon wafer, ingot, and producing method thereof
02/22/2005US6858062 Residual gas removing device and method thereof
02/22/2005US6858060 Comprises sintered molybdenum/copper and tungsten/copper composite powders; electronics; thermoconductivity
02/22/2005US6857950 Polishing apparatus, semiconductor device manufacturing method using the polishing apparatus, and semiconductor device manufactured by the manufacturing method
02/22/2005US6857946 Carrier head with a flexure
02/22/2005US6857945 Multi-chamber carrier head with a flexible membrane
02/22/2005US6857939 Dicing machine with interlock
02/22/2005US6857931 Method of detecting a substrate in a carrier head
02/22/2005US6857841 Vehicle for transporting a semiconductor device carrier to a semiconductor processing tool
02/22/2005US6857838 Substrate processing system with positioning device and substrate positioning method
02/22/2005US6857764 Illumination optical system and exposure apparatus having the same
02/22/2005US6857557 Low temperature microelectronic die to substrate interconnects
02/22/2005US6857554 Method and device for determining the vectorial distance between the capillary and the image recognition system of a wire bonder
02/22/2005US6857543 Low volume dispense unit and method of using
02/22/2005US6857524 Tray for semiconductors
02/22/2005US6857523 Method and apparatus for reducing contamination in a plastic container
02/22/2005US6857437 Automated dense phase fluid cleaning system
02/22/2005US6857434 CMP slurry additive for foreign matter detection
02/22/2005US6857388 Cold wall chemical vapor deposition apparatus with a heater control unit
02/22/2005US6857387 Multiple frequency plasma chamber with grounding capacitor at cathode
02/22/2005US6857200 Supercritical point drying apparatus for semiconductor device manufacturing and bio-medical sample processing
02/22/2005US6857195 Apparatus for the measurement or machining of an object, provided with a displacement stage with wedge-shaped guides