Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2005
03/08/2005US6864458 Iced film substrate cleaning
03/08/2005US6864423 Bump chip lead frame and package
03/08/2005US6864295 Gas-generating, pressure-sensitive adhesive composition
03/08/2005US6864193 Aqueous cleaning composition containing copper-specific corrosion inhibitor
03/08/2005US6864192 Langmuir-blodgett chemically amplified photoresist
03/08/2005US6864191 Hydrogen barrier layer and method for fabricating semiconductor device having the same
03/08/2005US6864189 Methodology for measuring and controlling film thickness profiles
03/08/2005US6864188 Semiconductor configuration and process for etching a layer of the semiconductor configuration using a silicon-containing etching mask
03/08/2005US6864187 Method of washing a semiconductor wafer
03/08/2005US6864186 Method of reducing surface contamination in semiconductor wet-processing vessels
03/08/2005US6864185 Fine line printing by trimming the sidewalls of pre-developed resist image
03/08/2005US6864184 Method for reducing critical dimension attainable via the use of an organic conforming layer
03/08/2005US6864183 Method for manufacturing a semiconductor device
03/08/2005US6864181 Method and apparatus to form a planarized Cu interconnect layer using electroless membrane deposition
03/08/2005US6864180 Method for reworking low-k polymers used in semiconductor structures
03/08/2005US6864179 Semiconductor memory device having COB structure and method of fabricating the same
03/08/2005US6864178 Method of making a MOS transistor
03/08/2005US6864177 Method for manufacturing metal line contact plug of semiconductor device
03/08/2005US6864176 Fabrication process for bonded wafer precision layer thickness control and its non-destructive measurement method
03/08/2005US6864175 Method for fabricating integrated circuit arrangements, and associated circuit arrangements, in particular tunnel contact elements
03/08/2005US6864174 Iteratively selective gas flow control and dynamic database to achieve CD uniformity
03/08/2005US6864173 Method for forming bit lines of semiconductor device
03/08/2005US6864172 Manufacturing method of semiconductor device
03/08/2005US6864171 Via density rules
03/08/2005US6864170 Compact semiconductor structure
03/08/2005US6864169 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
03/08/2005US6864168 Bump and fabricating process thereof
03/08/2005US6864167 Wafer scale solder bump fabrication method and structure
03/08/2005US6864166 Method of manufacturing wire bonded microelectronic device assemblies
03/08/2005US6864165 Method of fabricating integrated electronic chip with an interconnect device
03/08/2005US6864164 Finfet gate formation using reverse trim of dummy gate
03/08/2005US6864163 Fabrication of dual work-function metal gate structure for complementary field effect transistors
03/08/2005US6864162 Article comprising gated field emission structures with centralized nanowires and method for making the same
03/08/2005US6864161 Method of forming a gate structure using a dual step polysilicon deposition procedure
03/08/2005US6864160 Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts
03/08/2005US6864159 Method for fabricating III-V compound semiconductor
03/08/2005US6864158 Method of manufacturing nitride semiconductor substrate
03/08/2005US6864156 Semiconductor wafer with well contacts on back side
03/08/2005US6864155 Methods of forming silicon-on-insulator comprising integrated circuitry, and wafer bonding methods of forming silicon-on-insulator comprising integrated circuitry
03/08/2005US6864154 Process for lapping wafer and method for processing backside of wafer using the same
03/08/2005US6864153 Methods employing hybrid adhesive materials to secure components of semiconductor device assemblies and packages to one another
03/08/2005US6864152 Fabrication of trenches with multiple depths on the same substrate
03/08/2005US6864151 Method of forming shallow trench isolation using deep trench isolation
03/08/2005US6864150 Manufacturing method of shallow trench isolation
03/08/2005US6864149 SOI chip with mesa isolation and recess resistant regions
03/08/2005US6864148 Corner protection to reduce wrap around
03/08/2005US6864147 Protective coating for electrolytic capacitors
03/08/2005US6864146 Metal oxide integrated circuit on silicon germanium substrate
03/08/2005US6864145 Method of fabricating a robust gate dielectric using a replacement gate flow
03/08/2005US6864144 Method of stabilizing resist material through ion implantation
03/08/2005US6864143 Eliminate bridging between gate and source/drain in cobalt salicidation
03/08/2005US6864142 Method to produce a factory programmable IC using standard IC wafers and the structure
03/08/2005US6864141 Method of incorporating nitrogen into metal silicate based dielectrics by energized nitrogen ion beams
03/08/2005US6864140 Thin-film transistor used as heating element for microreaction chamber
03/08/2005US6864138 Methods of forming capacitor structures and DRAM arrays
03/08/2005US6864137 MIM capacitor with diffusion barrier
03/08/2005US6864136 DRAM cell with enhanced SER immunity
03/08/2005US6864135 Semiconductor fabrication process using transistor spacers of differing widths
03/08/2005US6864134 Manufacturing method of thin film transistor substrate
03/08/2005US6864133 Device, method of manufacturing device, electro-optic device, and electronic equipment
03/08/2005US6864132 Methods of fabricating integrated circuit gates by pretreating prior to oxidizing
03/08/2005US6864130 Crystallization method of silicon thin film, thin film transistor manufactured using the method, and flat panel display including the thin film transistor
03/08/2005US6864129 Double gate MOSFET transistor and method for the production thereof
03/08/2005US6864128 Manufacturing method for a semiconductor device
03/08/2005US6864127 Semiconductor device and method of fabricating the same
03/08/2005US6864126 Methods of manufacturing semiconductor devices
03/08/2005US6864125 Process for growing a dielectric layer on a silicon-containing surface using a mixture of N2O and O3
03/08/2005US6864124 Method of forming a fuse
03/08/2005US6864123 Memory device and manufacturing method therefor
03/08/2005US6864121 Method of manufacturing circuit device
03/08/2005US6864119 COF semiconductor device and a manufacturing method for the same
03/08/2005US6864118 Electronic devices containing organic semiconductor materials
03/08/2005US6864116 Electronic package of photo-sensing semiconductor devices, and the fabrication and assembly thereof
03/08/2005US6864115 Low threading dislocation density relaxed mismatched epilayers without high temperature growth
03/08/2005US6864112 Method of production of a patterned semiconductor layer
03/08/2005US6864111 Column-row addressable electric microswitch arrays and sensor matrices employing them
03/08/2005US6864110 Electrophoretic processes for the selective deposition of materials on a semiconducting device
03/08/2005US6864109 Method and system for determining a component concentration of an integrated circuit feature
03/08/2005US6864108 Measurement of wafer temperature in semiconductor processing chambers
03/08/2005US6864107 Determination of nonphotolithographic wafer process-splits in integrated circuit technology development
03/08/2005US6864105 Method of manufacturing a probe card
03/08/2005US6864044 For removing photoresist residues after dry etching without attacking the wiring material or the interlayer insulating film
03/08/2005US6864041 Gate linewidth tailoring and critical dimension control for sub-100 nm devices using plasma etching
03/08/2005US6864021 Photomask and pattern forming method used in a thermal flow process and semiconductor integrated circuit fabricated using the thermal flow process
03/08/2005US6863923 Method and compositions for printing substrates
03/08/2005US6863835 Magnetic barrier for plasma in chamber exhaust
03/08/2005US6863797 Electrolyte with good planarization capability, high removal rate and smooth surface finish for electrochemically controlled copper CMP
03/08/2005US6863795 Plating a wafer by exposing to a first solution of a sulfur depolarizing compound to brighten and level; exposing to a metal compound solution, applying a current; elimination of depletion/monitoring of additives and defects (bumps)
03/08/2005US6863789 Direct current sputtering; resonance network
03/08/2005US6863787 Dummy copper deprocessing
03/08/2005US6863784 Linear drive system for use in a plasma processing system
03/08/2005US6863772 Dual-port end point window for plasma etcher
03/08/2005US6863771 Differential pressure application apparatus for use in polishing layers of semiconductor device structures and methods
03/08/2005US6863770 Method and apparatus for polishing a substrate while washing a polishing pad of the apparatus with at least one free-flowing vertical stream of liquid
03/08/2005US6863769 Configuration and method for making contact with the back surface of a semiconductor substrate
03/08/2005US6863750 Having a purity of at least about 99.99% and an average grain size of about <150 microns; reducing a niobium compound in a container/agitator of a metal with less or the same vapor pressure at the melting point of niobium; sputtering target
03/08/2005US6863741 Cleaning processing method and cleaning processing apparatus
03/08/2005US6863736 Shaft cooling mechanisms
03/08/2005US6863735 Epitaxial growth furnace
03/08/2005US6863734 Substrate processing apparatus and method for manufacturing semiconductor device
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