Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2005
03/03/2005US20050050490 Method and equipment for simulation
03/03/2005US20050050486 Systems and methods utilizing fast analysis information during detailed analysis of a circuit design
03/03/2005US20050050412 Semiconductor circuit apparatus and test method thereof
03/03/2005US20050049836 Method of defect root cause analysis
03/03/2005US20050049737 Defect analysis sampling control
03/03/2005US20050049382 Polysilesquioxane copolymer with porogens; ladder polymers; dielectrics with improved solubility, flowability and mechanical properties
03/03/2005US20050049352 Solvent-modified resin compositions and methods of use thereof
03/03/2005US20050049334 Mixture of polymer, silica filler and solvent; encapsulation of electron chips
03/03/2005US20050048880 Chemical mechanical polishing system having multiple polishing stations and providing relative linear polishing motion
03/03/2005US20050048877 Method of chemical mechanical polishing using abrasive particles of alkaline earth metal salts
03/03/2005US20050048876 Fabricating and cleaning chamber components having textured surfaces
03/03/2005US20050048862 Correcting potential defects in an OLED device
03/03/2005US20050048803 Insulator for an organic electronic component
03/03/2005US20050048801 In-situ-etch-assisted HDP deposition using SiF4 and hydrogen
03/03/2005US20050048800 Controlled growth of highly uniform, oxide layers, especially ultrathin layers
03/03/2005US20050048799 Film forming material, film forming method, and film
03/03/2005US20050048798 Method for chemical etch control of noble metals in the presence of less noble metals
03/03/2005US20050048797 Method of forming thin film
03/03/2005US20050048796 Forming method and a forming apparatus of nanocrystalline silicon structure
03/03/2005US20050048795 Method for ultra low-K dielectric deposition
03/03/2005US20050048794 Method for making a semiconductor device having a high-k gate dielectric
03/03/2005US20050048793 Fabrication of DRAM and other semiconductor devices with an insulating film using a wet rapid thermal oxidation process
03/03/2005US20050048791 Selective etch process for making a semiconductor device having a high-k gate dielectric
03/03/2005US20050048790 Plasma etching method for semiconductor device
03/03/2005US20050048789 Method for plasma etching a dielectric layer
03/03/2005US20050048788 Methods of reducing or removing micromasking residue prior to metal etch using oxide hardmask
03/03/2005US20050048787 Dry etching method and apparatus
03/03/2005US20050048786 Methods of manufacturing semiconductor devices having capacitors
03/03/2005US20050048785 Reduction of feature critical dimensions
03/03/2005US20050048784 Semiconductor devices and methods of manufacturing such semiconductor devices
03/03/2005US20050048783 Method for planarizing a surface of a semiconductor wafer
03/03/2005US20050048782 Method of fabricating a semiconductor device
03/03/2005US20050048781 Method for plasma etching a wafer
03/03/2005US20050048780 Apparatus for inspecting three dimensional shape of a specimen and method of watching an etching process using the same
03/03/2005US20050048779 Semiconductor device and method of manufacturing the same
03/03/2005US20050048778 Use of thin SOI to inhibit relaxation of SiGe layers
03/03/2005US20050048777 Method for fabricating semiconductor device
03/03/2005US20050048776 Integrated circuit copper plateable barriers
03/03/2005US20050048775 Depositing a tantalum film
03/03/2005US20050048774 Method for manufacturing semiconductor device
03/03/2005US20050048773 Semiconductor process and composition for forming a barrier material overlying copper
03/03/2005US20050048772 Bond pad techniques for integrated circuits
03/03/2005US20050048771 Hardmask employing multiple layers of silicon oxynitride
03/03/2005US20050048769 Method of manufacturing a semiconductor device
03/03/2005US20050048768 Apparatus and method for forming interconnects
03/03/2005US20050048767 Method for fabricating electronic device
03/03/2005US20050048766 Method for fabricating a conductive plug in integrated circuit
03/03/2005US20050048765 Sealed pores in low-k material damascene conductive structures
03/03/2005US20050048764 Method of generating interconnection pattern
03/03/2005US20050048763 Method for preventing contact defects in interlayer dielectric layer
03/03/2005US20050048762 Integrated circuit capacitor in multi-level metallization
03/03/2005US20050048761 Conducting wire and contact opening forming method for reducing photoresist thickness and via resistance
03/03/2005US20050048760 Re-performable spin-on process
03/03/2005US20050048759 Method for fabricating thermally enhanced semiconductor device
03/03/2005US20050048758 Diffusion solder position, and process for producing it
03/03/2005US20050048756 Ball film for integrated circuit fabrication and testing
03/03/2005US20050048755 Method of forming a bond pad
03/03/2005US20050048754 Processing method for increasing packaging density of an integrated circuit
03/03/2005US20050048753 Method of forming a conformal spacer adjacent to a gate electrode structure
03/03/2005US20050048752 Ultra thin channel MOSFET
03/03/2005US20050048751 System and method for filling openings in semiconductor products
03/03/2005US20050048750 Method for fabricating a semiconductor device having salicide
03/03/2005US20050048749 [interconnect structure and method for fabricating the same]
03/03/2005US20050048747 Ohmic metal contact and channel protection in GaN devices using an encapsulation layer
03/03/2005US20050048746 Method for reducing the effective thickness of gate oxides by nitrogen implantation and anneal
03/03/2005US20050048745 Deposition over mixed substrates
03/03/2005US20050048744 Method of manufacturing semiconductor device
03/03/2005US20050048743 Method of growing as a channel region to reduce source/drain junction capicitance
03/03/2005US20050048742 Multiple grow-etch cyclic surface treatment for substrate preparation
03/03/2005US20050048740 Semiconductor device and manufacturing method thereof
03/03/2005US20050048739 Multifunctional metallic bonding
03/03/2005US20050048738 Arrangements incorporating laser-induced cleaving
03/03/2005US20050048737 Method for bonding a pair of silicon wafers together, and a semiconductor wafer
03/03/2005US20050048736 Methods for adhesive transfer of a layer
03/03/2005US20050048735 Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same
03/03/2005US20050048734 Permeable capacitor electrode
03/03/2005US20050048732 Method to produce transistor having reduced gate height
03/03/2005US20050048731 Siliciding spacer in integrated circuit technology
03/03/2005US20050048730 Field effect transistors and methods for manufacturing field effect transistors
03/03/2005US20050048729 Method of manufacturing a transistor
03/03/2005US20050048728 Semiconductor device and manufacturing method therefor
03/03/2005US20050048727 Formation of finfet using a sidewall epitaxial layer
03/03/2005US20050048726 Lateral MOSFET structure of an integrated circuit having separated device regions
03/03/2005US20050048725 Semiconductor device and manufacturing method thereof
03/03/2005US20050048724 Deep submicron manufacturing method for electrostatic discharge protection devices
03/03/2005US20050048723 Method of forming gate oxide layer in semiconductor device
03/03/2005US20050048722 Method of manufacturing semiconductor device
03/03/2005US20050048721 Structure and fabricating method with self-aligned bit line contact to word line in split gate flash
03/03/2005US20050048720 Floating gate memory cell, floating gate memory arrangement circuit arrangement and method for fabricating a floating gate memory cell
03/03/2005US20050048719 System-on-chip including DRAM & analog device for improving DRAM capacitance and method for fabricating the same
03/03/2005US20050048718 Method for manufacturing flash memory device
03/03/2005US20050048717 Semiconductor memory and method of producing the same
03/03/2005US20050048716 Methods of forming capacitors
03/03/2005US20050048715 Trench capacitor with pillar
03/03/2005US20050048714 Trench DRAM cell with vertical device and buried word lines
03/03/2005US20050048713 Mim capacitor having a high-dielectric-constant interelectrode insulator and a method of fabrication
03/03/2005US20050048712 Method for forming high voltage complementary metal-oxide semiconductor by utilizing retrograde ion implantation
03/03/2005US20050048711 Dynamic random access memory and fabrication thereof
03/03/2005US20050048709 Multiple operating voltage vertical replacement-gate (VRG) transistor
03/03/2005US20050048708 Method of manufacturing a semiconductor device
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