Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2005
03/10/2005US20050051883 Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
03/10/2005US20050051880 Tape substrates with mold gate support structures that are coplanar with conductive traces thereof and associated methods
03/10/2005US20050051877 Semiconductor package having high quantity of I/O connections and method for fabricating the same
03/10/2005US20050051876 Integrated circuit package with leadframe enhancement and method of manufacturing the same
03/10/2005US20050051875 Lead frame, manufacturing method of the same, and semiconductor device using the same
03/10/2005US20050051871 Symmetric inducting device for an integrated circuit having a ground shield
03/10/2005US20050051870 Semiconductor device and a method of manufacturing the same
03/10/2005US20050051869 Semiconductor device
03/10/2005US20050051867 SRAM cell and methods of fabrication
03/10/2005US20050051866 Method for forming devices with multiple spacer widths
03/10/2005US20050051865 Control of air gap position in a dielectric layer
03/10/2005US20050051864 Control of air gap position in a dielectric layer
03/10/2005US20050051863 Silicon substrate having an insulating layer, silicon substrate, and assembly of a silicon substrate with an insulating layer
03/10/2005US20050051857 Semiconductor device
03/10/2005US20050051856 Semiconductor device
03/10/2005US20050051855 Semiconductor device
03/10/2005US20050051854 Structure and method for metal replacement gate of high performance
03/10/2005US20050051852 Memory devices with memory cell transistors having gate sidewall spacers with different dielectric properties and methods of fabricating the same
03/10/2005US20050051851 Structure and method of making strained channel cmos transistors having lattice-mismatched epitaxial extension and source and drain regions
03/10/2005US20050051850 Semiconductor device and method of manufacturing the same
03/10/2005US20050051849 Semiconductor device, method of manufacturing the same and liquid jet apparatus
03/10/2005US20050051848 Method of manufacturing an ESD protection device with the same mask for both LDD and ESD implantation
03/10/2005US20050051847 Semiconductor input protection circuit
03/10/2005US20050051845 Semiconductor device and manufacturing method therefor
03/10/2005US20050051844 Versatile system for limiting mobile charge ingress in SOI semiconductor structures
03/10/2005US20050051843 Semiconductor device and manufacturing method thereof
03/10/2005US20050051841 Stress-controlled dielectric integrated circuit
03/10/2005US20050051840 High withstand-voltage semiconductor device and method of fabricating the same
03/10/2005US20050051839 Reduced cap layer erosion for borderless contacts
03/10/2005US20050051838 Protection against in-process charging in silicon-oxide-nitride-oxide-silicon (SONOS) memories
03/10/2005US20050051837 Nonvolatile semiconductor memory device and method of manufacturing the same
03/10/2005US20050051836 Split-gate nonvolatile memory device and method of manufacturing the same
03/10/2005US20050051835 EEPROM device for increasing a coupling ratio and fabrication method thereof
03/10/2005US20050051834 Semiconductor device and method of manufacturing the same
03/10/2005US20050051833 [flash memory cell and manufacturing method thereof]
03/10/2005US20050051832 Semiconductor device and a method of manufacturing the same
03/10/2005US20050051831 Nonvolatile semiconductor memory and method for fabricating the same
03/10/2005US20050051830 Trench corner effect bidirectional flash memory cell
03/10/2005US20050051829 Semiconductor device
03/10/2005US20050051828 Methods of forming metal thin films, lanthanum oxide films, and high dielectric films for semiconductor devices using atomic layer deposition
03/10/2005US20050051827 Capacitor constructions and rugged silicon-containing surfaces
03/10/2005US20050051826 Methods of forming rugged silicon-containing surfaces
03/10/2005US20050051825 Semiconductor device and manufacturing method thereof
03/10/2005US20050051824 Semiconductor device having a thin film capacitor and method for fabricating the same
03/10/2005US20050051823 Semiconductor device and method of manufacturing the same
03/10/2005US20050051822 Support for vertically oriented capacitors during the formation of a semiconductor device
03/10/2005US20050051821 Semiconductor storage device which includes a hydrogen diffusion inhibiting layer
03/10/2005US20050051820 Fabrication process for a magnetic tunnel junction device
03/10/2005US20050051819 Device and method for inhibiting hydrogen damage in ferroelectric capacitor devices
03/10/2005US20050051816 Semiconductor light receiving device and manufacturing method for the same
03/10/2005US20050051815 Short-channel Schottky-barrier MOSFET device and manufacturing method
03/10/2005US20050051814 Semiconductor device and a method of manufacturing the same
03/10/2005US20050051812 Multiple gate semiconductor device and method for forming same
03/10/2005US20050051811 Semiconductor device, a manufacturing method thereof, and a camera
03/10/2005US20050051810 Semiconductor package and method of manufacturing the same
03/10/2005US20050051809 Dummy fill for integrated circuits
03/10/2005US20050051806 Memory cell unit, nonvolatile semiconductor device, and liquid crystal display device including the nonvolatile semiconductor device
03/10/2005US20050051805 Nanotube transistor device
03/10/2005US20050051804 Nitride-based compound semiconductor electron device
03/10/2005US20050051803 Wiring layout of semiconductor device and design method of the same
03/10/2005US20050051802 Semiconductor device
03/10/2005US20050051801 Standard cell back bias architecture
03/10/2005US20050051799 Heterojunction bipolar transistor structure
03/10/2005US20050051798 Silicon germanium heterojunction bipolar transistor with carbon incorporation
03/10/2005US20050051797 Fabrication method for heterojunction bipolar transistor
03/10/2005US20050051795 Epitaxial growth of relaxed silicon germanium layers
03/10/2005US20050051792 Semiconductor package
03/10/2005US20050051788 Nitride-based semiconductor light-emitting device and manufacturing method thereof
03/10/2005US20050051786 Light emitting element, method of manufacturing the same, and semiconductor device having light emitting element
03/10/2005US20050051783 Light emitting device and method of manufacturing the same
03/10/2005US20050051781 Light emitting diode and method of making the same
03/10/2005US20050051780 Thin film transistor, display device and their production
03/10/2005US20050051779 Semiconductor device
03/10/2005US20050051773 Semiconductor device and process for production thereof
03/10/2005US20050051772 Semiconductor device and method of manufacturing the same
03/10/2005US20050051770 Electrode substrate, thin film transistor, display device and their production
03/10/2005US20050051765 Test structure for a single-sided buried strap DRAM memory cell array
03/10/2005US20050051722 Inspection system, inspection method, and process management method
03/10/2005US20050051721 Sample dimension-measuring method and charged particle beam apparatus
03/10/2005US20050051605 Process of manufacturing a solder-fill for applying to semiconductor package
03/10/2005US20050051604 Method and system for forming ball grid array ("BGA") packages
03/10/2005US20050051600 Method and system for stud bumping
03/10/2005US20050051521 Solder ball bonding method and bonding device
03/10/2005US20050051520 Processing apparatus
03/10/2005US20050051512 Chemical vapor deposition of tunsten nitride, tungsten silicon nitride and tungsten layers in single and dual damascene interconnect trench or with micron nodes for for MOSFET and CMOS applications; improved heat resistance
03/10/2005US20050051437 Having porous member (plating solution impregnated member), the plating apparatus being capable of handling and easily controlling composition of plating soution; especially for electroless deposition of copper or silver; for filling fine interconnect pattern in semiconductor substrate
03/10/2005US20050051436 Electroplating metal into recessed structure by applying first electroplating waveform having first current to anode to enhance deposition of metal at bottom of structure, then changing waveform applied to anode to second electroplating waveform having second current; high speed
03/10/2005US20050051433 System for monitoring, dosing and distribution of a chemical composition in a material treatment process, the chemical composition containing at least one additive for maintaining quality of the chemical treatment process; particularly directed to the field of management of electroplating bath solutions
03/10/2005US20050051432 Electrolytic processing apparatus and method
03/10/2005US20050051427 Comprising electrode material and insulating material arranged in a spiral configuration; time-efficient and inexpensive method for manufacturing electrodes that exhibit long term robustness and which do not introduce contaminants
03/10/2005US20050051351 Semiconductor device, card, system, and methods of initializing and checking the authenticity and the identify of the semiconductor device
03/10/2005US20050051273 Plasma processing apparatus
03/10/2005US20050051270 Method for monitoring plasma processing apparatus
03/10/2005US20050051268 Vacuum enclosure; adjustment confining rings; etching gas
03/10/2005US20050051267 Detecting physical properties; transmission signals; monitoring polishing
03/10/2005US20050051253 Method for producing ceramic substrate, and ceramic substrate
03/10/2005US20050051246 Substrate processing method and substrate processing apparatus
03/10/2005US20050051234 Purgeable container for low vapor pressure chemicals
03/10/2005US20050051200 Wafer cleaning apparatus with multiple wash-heads
03/10/2005US20050051196 Dispensing develop onto semiconductor wafer; adjustable vertical knife rings; spacing gap
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