Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2005
10/27/2005US20050236668 STRUCTURES AND METHODS FOR MANUFACTURING OF DISLOCATION FREE STRESSED CHANNELS IN BULK SILICON AND SOI CMOS DEVICES BY GATE STRESS ENGINEERING WITH SiGe AND/OR Si:C
10/27/2005US20050236667 Manufacture of semiconductor device with selective amorphousizing
10/27/2005US20050236665 Trench MIS device having implanted drain-drift region and thick bottom oxide and process for manufacturing the same
10/27/2005US20050236664 Semiconductor device and method of manufacturing thereof
10/27/2005US20050236663 Method of manufacturing a semiconductor device and semiconductor device obtainable with such a method
10/27/2005US20050236662 Flash memory device and method for fabricating the same, and programming and erasing method thereof
10/27/2005US20050236661 Nonvolatile semiconductor memory device having element isolating region of trench type
10/27/2005US20050236660 Semiconductor device and method of fabricating the same
10/27/2005US20050236659 Non-volatile memory cell and method of forming the same
10/27/2005US20050236658 Semiconductor device and production method therefor
10/27/2005US20050236657 Method of stress-testing an isolation gate in a dynamic random access memory
10/27/2005US20050236656 Methods of Forming Memory Arrays; and Methods of Forming Contacts to Bitlines
10/27/2005US20050236655 Semiconductor device manufacturing method and semiconductor device
10/27/2005US20050236654 Ferroelectric film laminated body, ferroelectric memory, piezoelectric element, liquid jet head, and printer
10/27/2005US20050236653 Image sensor having notch filter and method for fabricating the same
10/27/2005US20050236652 MFS type field effect transistor, its manufacturing method, ferroelectric memory and semiconductor device
10/27/2005US20050236651 Semiconductor device, semiconductor circuit and method for producing semiconductor device
10/27/2005US20050236649 DRAM arrays
10/27/2005US20050236648 Inspection method and inspection system using charged particle beam
10/27/2005US20050236647 Structure and method of forming a bipolar transistor having a self-aligned raised extrinsic base using a link-up region formed froman opening therein
10/27/2005US20050236646 Nitride semiconductor device and manufacturing method thereof
10/27/2005US20050236645 Structure and method of forming bipolar transistor having a self-aligned raised extrinsic base using self-aligned etch stop layer
10/27/2005US20050236644 Sensor packages and methods of making the same
10/27/2005US20050236643 Nitride semiconductor device and manufacturing method thereof
10/27/2005US20050236640 Laminates for encapsulating devices
10/27/2005US20050236635 Semiconductor device and method of manufacturing the same
10/27/2005US20050236633 Substrate buffer structure for group III nitride devices
10/27/2005US20050236626 Semiconductor device, producing method of semiconductor substrate, and producing method of semiconductor device
10/27/2005US20050236624 Thin film transistor array substrate for liquid crystal display and method of fabricating the same
10/27/2005US20050236623 Semiconductor device
10/27/2005US20050236622 Electronic device and method of manufacturing the same
10/27/2005US20050236618 Semiconductor device
10/27/2005US20050236617 Semiconductor device
10/27/2005US20050236616 Reliable semiconductor structure and method for fabricating
10/27/2005US20050236613 Quantum-well memory device and method for making the same
10/27/2005US20050236601 Barrier polishing solution
10/27/2005US20050236587 Ion beam device and ion beam processing method, and holder member
10/27/2005US20050236585 Exposure apparatus and exposure method using EUV light
10/27/2005US20050236584 Exposure method and apparatus
10/27/2005US20050236583 Method and apparatus for determining thickness of a semiconductor substrate at the floor of a trench
10/27/2005US20050236553 Solid-state image sensing element and its design support method, and image sensing device
10/27/2005US20050236400 Resistive heaters and uses thereof
10/27/2005US20050236395 Pulsed processing semiconductor heating methods using combinations of heating sources
10/27/2005US20050236381 Laser beam processing machine
10/27/2005US20050236379 Etching
10/27/2005US20050236378 Program-controlled dicing of a substrate using a pulsed laser
10/27/2005US20050236377 Merie plasma reactor with overhead RF electrode tuned to the plasma with arcing suppression
10/27/2005US20050236369 Deposit removing apparatus and deposit removing method
10/27/2005US20050236368 Method for manufacturing semiconductor device
10/27/2005US20050236366 Use of C2F6 gas to gain vertical profile in high dosage implanted poly film
10/27/2005US20050236365 Dry etching method and semiconductor device
10/27/2005US20050236364 Etching system and etching method
10/27/2005US20050236362 Cleaning solution and manufacturing method for semiconductor device
10/27/2005US20050236357 etching the semiconductor substrate so as to form nanowires in a direction substantially perpendicular to the surface of the semiconductor substrate
10/27/2005US20050236298 Ready-for-dispatch package for semiconductor wafers, and method for the ready-for-dispatch packaging of semiconductor wafers
10/27/2005US20050236276 Method for coating substrates in inline installations
10/27/2005US20050236270 Controlled cooling of sputter targets
10/27/2005US20050236268 Substrate processing apparatus
10/27/2005US20050236181 Novel ECP method for preventing the formation of voids and contamination in vias
10/27/2005US20050236114 Sample processing system
10/27/2005US20050236111 Processing apparatus
10/27/2005US20050236110 Semiconductor component handling device having a performance film
10/27/2005US20050236108 Enhanced plasma etch process
10/27/2005US20050236107 Method of thermal adherend release and apparatus for thermal adherend release
10/27/2005US20050236104 Method for mounting semiconductor device, as well as circuit board, electrooptic device, and electronic device
10/27/2005US20050236092 Multi-chamber system having compact installation set-up for an etching facility for semiconductor device manufacturing
10/27/2005US20050236091 Manufacturing method of a device
10/27/2005US20050236032 Compound thin-film solar cell and process for producing the same
10/27/2005US20050236018 Substrate treating method and apparatus
10/27/2005US20050235918 Substrate treating apparatus
10/27/2005US20050235917 Method and apparatus for monitoring film deposition in a process chamber
10/27/2005US20050235914 Conveyor device and film formation apparatus for a flexible substrate
10/27/2005US20050235904 Method of manufacturing nano-wire
10/27/2005US20050235696 Positioning a nonrigid implant in a lower half of the uterine cavity and allowing it to remain to promote tissue growth that results in adhesion formation; reduces or eliminates abnormal intrauterine bleeding causing amenorrhea
10/27/2005US20050235655 System for forming aerosols and cooling device incorporated therein
10/27/2005US20050235487 Device and method for fastener-free connection via a heat-shrinkable insert
10/27/2005DE29924811U1 Multi-chamber system of etching apparatus for production of semiconductor components
10/27/2005DE19920444B4 Verfahren zum Herstellen eines Halbleiterbausteins sowie Halbleiterbaustein A method of manufacturing a semiconductor device and semiconductor module
10/27/2005DE19915704B4 Resistzusammensetzung und Musterbildungsprozess Resist composition and patterning process
10/27/2005DE19820040B4 Halbleiterspeichervorrichtung A semiconductor memory device
10/27/2005DE19740948B4 Phasenschiebemaske und Verfahren zum Herstellen derselben Phase-shifting mask and method for manufacturing the same
10/27/2005DE19622037B4 Verfahren zur Prüfung von Defekten in auf Photomasken ausgebildeten Strukturen Procedure for the assessment of defects in structures formed on photomasks
10/27/2005DE10260770B4 DRAM-Speicher mit vertikal angeordneten Auswahltransistoren und Verfahren zur Herstellung DRAM memory with vertical selection transistors and methods for preparing
10/27/2005DE102005014539A1 Waferverarbeitungsverfahren Wafer processing method
10/27/2005DE102005013545A1 Semiconductor chip manufacturing method for electronic and optical industry, involves palletizing wafer in wafer sawing step, and bonding pelletized wafer and sawing framework in wafer assembly step, where steps are performed on same table
10/27/2005DE102005013256A1 Laserstrahl-Bearbeitungsmaschine Laser beam processing machine
10/27/2005DE102005012356A1 Wet-etch composition for manufacturing e.g. electrode of a capacitor for semiconductor device comprises peracetic acid and fluorinated acid
10/27/2005DE102004058753A1 Verifizierung von Integrierte-Schaltung-Tests unter Verwendung einer Testsimulation und einer Integrierte-Schaltungs-Simulation mit einem simulierten Ausfall Verification of integrated circuit test using a test simulation and an integrated circuit simulation with a simulated failure
10/27/2005DE102004044785A1 Vorrichtung und Verfahren zur Bestimmung von Positionierkoordinaten für Halbleitersubstrate Apparatus and method for determination of semiconductor substrates for Positionierkoordinaten
10/27/2005DE102004018448A1 Halbleiterbauelement mit Gegensignalschaltung zum Vermeiden von Übersprechen elektronischer Baugruppen A semiconductor device with counter-signal circuit for preventing crosstalk of electronic modules
10/27/2005DE102004017680A1 Verfahren zur Reinigung und Ätzung eines Substrates mit einer transparenten, leitfähigen Oxidschicht, sowie Vorrichtung zur Durchführung des Verfahrens Process for cleaning and etching a substrate with a transparent conductive oxide layer, as well as apparatus for carrying out the method
10/27/2005DE102004017284A1 Integrierte Halbleiterschaltung und Verfahren zur Prüfung der integrierten Halbleiterschaltung A semiconductor integrated circuit and method for testing the semiconductor integrated circuit
10/27/2005DE102004017073A1 Verfahren zur Erzeugung von dielektrisch isolierenden Gräben (trenches) der SOI-Technologie für höhere Spannungen mit abgerundeten Kanten A process for producing dielectrically insulating trenches (trenches) of the SOI technology for higher voltages with rounded edges
10/27/2005DE102004016992A1 Bipolar-Transistor und Verfahren zur Herstellung eines Bipolar-Transistors Bipolar transistor and method for producing a bipolar transistor
10/27/2005DE102004016940A1 Schaltungsträger für einen Halbleiterschip und Bauelement Component carrier for a semiconductor chip and component
10/27/2005DE102004016600A1 Dispersion zum chemisch-mechanischen Polieren von Metalloberflächen enthaltend Metalloxidpartikel und ein kationisches Polymer Dispersion for the chemical-mechanical polishing of metal surfaces containing metal oxide particles and a cationic polymer
10/27/2005DE102004015923A1 Inspection method for resist structures on wafer surfaces uses test structures with test elements set out as a measuring scale and exposed to asymmetrical unbalanced capillary forces
10/27/2005DE102004014984A1 Verfahren zur Bestimmung des substitutionellen Kohlenstoffgehalts in poly- oder monokristallinem Silicium Method for determining the substitutional carbon content in poly or mono-crystalline silicon
10/27/2005DE102004014965A1 Memory cell production method for a non-volatile memory cell has a solid-state electrolyte area as a memory element activated by building in a fundamental rule
10/27/2005DE102004013932A1 Heat-treatment method for heat in a semiconductor substrate doped with a power-type doping agent uses main surfaces opposite each other
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