Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2005
11/03/2005WO2005013325A9 System for processing a treatment object
11/03/2005WO2005005562A3 Plasma spraying for joining silicon parts
11/03/2005WO2005000363B1 Atmospheric pressure non-thermal plasma device to clean and sterilize the surface of probes, cannulas, pin tools, pipettes and spray heads
11/03/2005WO2004109031A3 Surface-covering article and methods of installing the same
11/03/2005WO2004107393A3 Inducing semiconductor crystallization using a capillary structure
11/03/2005WO2004095534A3 Gaas substrate with sb buffering for high in devices
11/03/2005WO2004090940A3 Esd protection device and method making the same
11/03/2005WO2004090938A3 Thermal interconnect and interface systems, methods of production and uses thereof
11/03/2005WO2004088723A3 Polycrystalline germanium-based waveguide detector integrated on a thin silicon-on-insulator (soi) platform
11/03/2005WO2004077519A9 Dielectric barrier layer films
11/03/2005WO2004070471A3 Arc layer for semiconductor device
11/03/2005WO2004031455A3 Method, composition and apparatus for tunable selectivity during chemical mechanical polishing of metallic structures
11/03/2005US20050246676 Routing analysis method, logic synthesis method and circuit partitioning method for integrated circuit
11/03/2005US20050246667 Bus structure, database and method of designing interface
11/03/2005US20050246598 Voltage/process evaluation in semiconductors
11/03/2005US20050246287 Method for facilitating transaction of integrated circuit production among various parties through a network platform
11/03/2005US20050246127 Integrated process condition sensing wafer and data analysis system
11/03/2005US20050246124 Device and system for recording the motion of a wafer and a method therefrom
11/03/2005US20050246107 Photometrically modulated delivery of reagents
11/03/2005US20050246055 Method and system for providing dynamic verification and alignment of production tool loadports
11/03/2005US20050246051 Method for controlling semiconductor process
11/03/2005US20050245869 Blood drawing device with flash detction
11/03/2005US20050245717 Spin-on-glass anti-reflective coatings for photolithography
11/03/2005US20050245663 Over-coating agent for forming fine patterns and a method of forming fine patterns using such agent
11/03/2005US20050245409 Reducing oxide loss when using fluoride chemistries to remove post-etch residues in semiconductor processing
11/03/2005US20050245382 TiO2 -SiO2 glass useful as an optical material for an exposure device to be used for extreem ultraviolet lithography; fictive temperature of at most 1,200 degrees C., an OH group concentration of at most 600 ppm and a coefficient of thermal expansion of 0+-200 ppb/ degrees C. from 0 to 100 degrees
11/03/2005US20050245177 Wafer holding plate for wafer grinding apparatus and method for manufacturing the same
11/03/2005US20050245174 Method of processing a substrate
11/03/2005US20050245169 Method of polishing semiconductor wafer
11/03/2005US20050245155 Highly selective nitride etching employing surface mediated uniform reactive layer films
11/03/2005US20050245101 Methods and apparatus for transferring a substrate carrier within an electronic device manufacturing facility
11/03/2005US20050245100 Reliability improvement of SiOC etch with trimethylsilane gas passivation in Cu damascene interconnects
11/03/2005US20050245099 Film formation apparatus and method of using the same
11/03/2005US20050245098 Method and apparatus for selectively altering dielectric properties of localized semiconductor device regions
11/03/2005US20050245097 Method for synthesizing polymeric material, method for forming polymer thin film and method for forming interlayer insulating film
11/03/2005US20050245096 Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device made
11/03/2005US20050245095 Growth of planar reduced dislocation density m-plane gallium nitride by hydride vapor phase epitaxy
11/03/2005US20050245094 Method to reduce photoresist pattern collapse by controlled surface microroughening
11/03/2005US20050245093 Atomic layer deposition methods and atomic layer deposition tools
11/03/2005US20050245092 Method for making a semiconductor structure using silicon germanium
11/03/2005US20050245091 Passivation for cleaning a material
11/03/2005US20050245089 Process of manufacturing a semiconductor device
11/03/2005US20050245088 Method for barc over-etch time adjust with real-time process feedback
11/03/2005US20050245087 Wiring over substrate, semiconductor device, and methods for manufacturing thereof
11/03/2005US20050245086 Adaptive electropolishing using thickness measurement and removal of barrier and sacrificial layers
11/03/2005US20050245085 Method for forming pattern using printing method
11/03/2005US20050245084 Filling high aspect ratio openings by enhanced electrochemical deposition (ECD)
11/03/2005US20050245083 Apparatus and method for electrochemically depositing metal on a semiconductor workpiece
11/03/2005US20050245082 Process for removing organic materials during formation of a metal interconnect
11/03/2005US20050245081 Material for contact etch layer to enhance device performance
11/03/2005US20050245080 Method and apparatus for processing substrate
11/03/2005US20050245079 Basic meterial for patterning and patterning method
11/03/2005US20050245078 Manufacturing method of display device and semiconductor device
11/03/2005US20050245077 Reverse tone mask method for post-CMP elimination of copper overburden
11/03/2005US20050245075 Semiconductor device and method of manufacturing same
11/03/2005US20050245074 In-situ etch-stop etch and ashing in association with damascene processing in forming semiconductor interconnect structures
11/03/2005US20050245073 Method for forming contact plug of semiconductor device
11/03/2005US20050245072 Method and apparatus for fabricating metal layer
11/03/2005US20050245071 Copper damascene integration scheme for improved barrier layers
11/03/2005US20050245070 Barrier for interconnect and method
11/03/2005US20050245069 Substrate flattening method
11/03/2005US20050245068 Dual damascene interconnect structures having different materials for line and via conductors
11/03/2005US20050245067 Top layers of metal for high performance IC's
11/03/2005US20050245066 Methods of forming solder bumps on exposed metal pads and related structures
11/03/2005US20050245065 Semiconductor device and method for manufacturing the same
11/03/2005US20050245064 Method for preventing voids in metal interconnects
11/03/2005US20050245063 Method for forming suspended transmission line structures in back end of line processing
11/03/2005US20050245062 Single row bond pad arrangement
11/03/2005US20050245061 Semiconductor device and manufacturing method thereof
11/03/2005US20050245060 Package design using thermal linkage from die to printed circuit board
11/03/2005US20050245059 Method for making an interconnect pad
11/03/2005US20050245058 Method for producing high throughput strained-si channel mosfets
11/03/2005US20050245056 Ion implantation with multiple concentration levels
11/03/2005US20050245055 Formation of lattice-tuning semiconductor substrates
11/03/2005US20050245054 Method for producing a nitride semiconductor crystal layer, nitride semiconductor crystal layer and substrate for producing the same
11/03/2005US20050245053 Semiconductor device and process for fabricating the same
11/03/2005US20050245052 Semiconductor device having a gettering layer
11/03/2005US20050245050 Implementation of protection layer for bond pad protection
11/03/2005US20050245049 Atomic implantation and thermal treatment of a semiconductor layer
11/03/2005US20050245048 SOI wafer and method for producing it
11/03/2005US20050245046 Semiconductor substrate, semiconductor device, and manufacturing methods for them
11/03/2005US20050245045 Semiconductor integrated circuit device having deposited layer for gate insulation
11/03/2005US20050245044 Methods of forming semiconductor constructions
11/03/2005US20050245043 Method of fabricating an integrated circuit including hollow isolating trenches and corresponding integrated circuit
11/03/2005US20050245042 Fabrication method for a semiconductor structure
11/03/2005US20050245041 Technique for reducing the roughness of metal lines in a metallization layer
11/03/2005US20050245040 Method for forming deep trench capacitor with liquid phase deposition oxide as collar oxide
11/03/2005US20050245039 PCMO thin film with resistance random access memory (RRAM) characteristics
11/03/2005US20050245038 Novel varactors for CMOS and BiCMOS technologies
11/03/2005US20050245037 Method for fabricating flash memory device
11/03/2005US20050245036 Reducing gate dielectric material to form a metal gate electrode extension
11/03/2005US20050245035 Method for producing low defect density strained -Si channel MOSFETS
11/03/2005US20050245034 Semiconductor device and its manufacturing method
11/03/2005US20050245033 Method for forming gate of semiconductor device
11/03/2005US20050245032 Application of a protective cover to an ophtalmological instrument part
11/03/2005US20050245031 Method of manufacturing EEPROM cell
11/03/2005US20050245029 Methods of fabricating flash memory devices having a sloped trench isolation structure
11/03/2005US20050245028 Method for fabricating flash memory device
11/03/2005US20050245027 Method for fabricating a stacked capacitor array having a regular arrangement of a plurality of stacked capacitors
11/03/2005US20050245026 Method of forming capacitor for semiconductor device
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