Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2006
03/30/2006US20060068588 Low-pressure deposition of ruthenium and rhenium metal layers from metal carbonyl precursors
03/30/2006US20060068587 Copper alloy for semiconductor interconnections, fabrication method thereof, semiconductor device having copper alloy interconnections fabricated by the method, and sputtering target for fabricating copper alloy interconnections for semiconductors
03/30/2006US20060068586 Method for implementation of back-illuminated CMOS or CCD imagers
03/30/2006US20060068585 Method for forming a metal silicide layer in a semiconductor device
03/30/2006US20060068584 Low k interlevel dielectric layer fabrication methods
03/30/2006US20060068583 A method for supercritical carbon dioxide processing of fluoro-carbon films
03/30/2006US20060068582 Method for decreasing impedance of a power source in a printed circuit board
03/30/2006US20060068581 Method of forming via hole in resin layer
03/30/2006US20060068580 Semiconductor device and fabrication method thereof
03/30/2006US20060068579 Stress-relief layers and stress-compensation collars with low-temperature solders for board-level joints, and processes of making same
03/30/2006US20060068578 Manufacturing method of semiconductor device and semiconductor device
03/30/2006US20060068577 Method for fabricating electrical interconnect structure
03/30/2006US20060068576 Lithography transfer for high density interconnect circuits
03/30/2006US20060068575 Gate electrode forming methods using conductive hard mask
03/30/2006US20060068574 Post passivation interconnection schemes on top of the IC Chips
03/30/2006US20060068573 Multilayer structure forming method, method of manufacturing wiring board, and method manufacturing of electronic apparatus
03/30/2006US20060068572 Semiconductor device manufacturing method
03/30/2006US20060068571 Semiconductor device having multiple-zone junction termination extension, and method for fabricating the same
03/30/2006US20060068570 Structure with through hole, production method thereof, and liquid discharge head
03/30/2006US20060068569 Semiconductor device and method for manufacturing the same
03/30/2006US20060068568 Silicon epitaxial wafer and method for manufacturing the same
03/30/2006US20060068567 Method for chip singulation
03/30/2006US20060068566 Film sticking method and film sticking device
03/30/2006US20060068565 System and method for hydrogen exfoliation
03/30/2006US20060068564 Micromachined electromechanical device
03/30/2006US20060068563 Method of manufacturing and structure of polycrystalline semiconductor thin-film heterostructures on dissimilar substrates
03/30/2006US20060068562 Trench isolation structure and method of manufacture therefor
03/30/2006US20060068561 Semiconductor device and method for manufacturing thereof
03/30/2006US20060068560 BST integration using thin buffer layer grown directly onto SiO2/Si substrate
03/30/2006US20060068559 Method of fabricating capacitor
03/30/2006US20060068558 Process and installation for doping an etched pattern of resistive elements
03/30/2006US20060068557 Semiconductor device and method for fabricating the same
03/30/2006US20060068556 Semiconductor device and method for fabricating the same
03/30/2006US20060068555 Structure and method for manufacturing MOSFET with super-steep retrograded island
03/30/2006US20060068554 Process for etching trenches in an integrated optical device
03/30/2006US20060068553 Method for forming a semiconductor device having a strained channel and a heterojunction source/drain
03/30/2006US20060068552 Method of manufacturing semiconductor device
03/30/2006US20060068551 Method for embedding NROM
03/30/2006US20060068550 Independently accessed double-gate and tri-gate transistors in same process flow
03/30/2006US20060068549 Image display device
03/30/2006US20060068548 Memory cell and method for forming the same
03/30/2006US20060068547 Methods of forming self-aligned floating gates using multi-etching
03/30/2006US20060068546 Self-aligned non-volatile memory and method of forming the same
03/30/2006US20060068545 Fabricating transistor structures for DRAM semiconductor components
03/30/2006US20060068544 Semiconductor device with DRAM cell and method of manufacturing the same
03/30/2006US20060068543 Electro-and electroless plating of metal in the manufacture of PCRAM Devices
03/30/2006US20060068542 Isolation trench perimeter implant for threshold voltage control
03/30/2006US20060068541 Integration scheme to improve NMOS with poly cap while mitigating PMOS degradation
03/30/2006US20060068540 Sequential chemical vapor deposition - spin-on dielectric deposition process
03/30/2006US20060068539 Method of fabricating CMOS type semiconductor device having dual gates
03/30/2006US20060068538 Manufacturing method of semiconductor device
03/30/2006US20060068537 Method of manufacturing semiconductor device
03/30/2006US20060068536 Method for manufacturing semiconductor device, and semiconductor device and electronic device
03/30/2006US20060068535 Methods of fabricating semiconductor devices
03/30/2006US20060068534 Method for manufacturing semiconductor device
03/30/2006US20060068533 Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system
03/30/2006US20060068532 Dual-gate thin-film transistor
03/30/2006US20060068531 Finfet sram cell using inverted finfet thin film transistors
03/30/2006US20060068530 Semiconductor device and method of manufacturing same
03/30/2006US20060068529 Self-aligned split-gate NAND flash memory and fabrication process
03/30/2006US20060068528 Method for manufacturing a CBRAM semiconductor memory
03/30/2006US20060068527 Molded stiffener for thin substrates
03/30/2006US20060068526 Acrylic polymer-containing gap filler forming composition for lithography
03/30/2006US20060068525 Method of manufacturing a wiring substrate and an electronic instrument
03/30/2006US20060068524 Protective tape separation method, and apparatus using the same
03/30/2006US20060068523 Integrated circuit package
03/30/2006US20060068522 Semiconductor device with improved heat dissipation, and a method of making semiconductor device
03/30/2006US20060068521 Method of fabricating microelectronic package using no-flow underfill technology and microelectronic package formed according to the method
03/30/2006US20060068519 Method for making electronic devices having a dielectric layer surface treatment
03/30/2006US20060068518 Forming vertically aligned liquid crystal mixtures
03/30/2006US20060068517 Optical device and method for making the same
03/30/2006US20060068516 Method for producing nitride semiconductor laser light source and apparatus for producing nitride semiconductor laser light source
03/30/2006US20060068515 Method for manufacturing a GaN based LED of a back hole structure
03/30/2006US20060068514 Method of detecting un-annealed ion implants
03/30/2006US20060068513 Film forming condition determination method, film forming method, and film structure manufacturing method
03/30/2006US20060068512 Method and apparatus for detecting defects
03/30/2006US20060068511 CMP process metrology test structures
03/30/2006US20060068510 Layer system with a silicon layer and a passivation layer, method for production of a passivation layer on a silicon layer and use thereof
03/30/2006US20060068509 MFIS ferroelectric memory array
03/30/2006US20060068508 Method for operating an MFIS ferroelectric memory array
03/30/2006US20060068507 Methods of forming a material film, methods of forming a capacitor, and methods of forming a semiconductor memory device using the same
03/30/2006US20060068335 Coating compositions for use with an overcoated photoresist
03/30/2006US20060068331 Exposure method
03/30/2006US20060068325 Oxime derivatives and the use thereof as latent acids
03/30/2006US20060068305 Method for aligning exposure mask and method for manufacturing thin film device substrate
03/30/2006US20060068304 Reduces an area necessary for alignment marks of an object while maintaining the minimum allowable gap among alignment marks on the same exposure mask
03/30/2006US20060068300 Mask blank substrate, mask blank, exposure mask, mask blank substrate manufacturing method, and semiconductor manufacturing method
03/30/2006US20060068298 Transfer mask blank, transfer mask, and transfer method using the transfer mask
03/30/2006US20060068181 Deep via seed repair using electroless plating chemistry
03/30/2006US20060068127 Depositing a catalyst particle on a substrate to define a deterministically located position; growing an aligned elongated nanostructure on the substrate; removing a portion of the conduit material to expose the catalyst particle; and removing catalyst particle and nanostructure to define a nanoconduit
03/30/2006US20060068126 Method for making an aligned carbon nanotube
03/30/2006US20060068104 Thin-film formation in semiconductor device fabrication process and film deposition apparatus
03/30/2006US20060068093 Coating device and coating film forming method
03/30/2006US20060068084 Method for manufacturing plasma display panels
03/30/2006US20060067600 Display element having filter material diffused in a substrate of the display element
03/30/2006US20060067128 Flash memory
03/30/2006US20060067111 Magnetic storage cell, magnetic memory device and magnetic memory device manufacturing method
03/30/2006US20060066854 Combined high speed optical profilometer and ellipsometer
03/30/2006US20060066844 Optical inspection apparatus and optical inspection method
03/30/2006US20060066391 Semiconductor integrated circuit device