Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2006
07/25/2006US7082074 Semiconductor device having a power down mode
07/25/2006US7082057 Semiconductor memory device
07/25/2006US7082055 Semiconductor integrated circuit device
07/25/2006US7082026 On chip capacitor
07/25/2006US7081963 Substrate holder, and use of the substrate holder in a highly accurate measuring instrument
07/25/2006US7081962 Aberration measuring apparatus for an optical system utilizing soft x-rays
07/25/2006US7081961 Method and apparatus for characterization of optical systems
07/25/2006US7081960 Interferometer, exposure apparatus, exposure method and interference length measurement method
07/25/2006US7081953 Apparatus and method for inspecting pattern
07/25/2006US7081950 Stage device and control method therefor, exposure apparatus, and device manufacturing method
07/25/2006US7081949 Illumination apparatus, projection exposure apparatus, and device fabrication method
07/25/2006US7081948 System for automated focus measuring of a lithography tool
07/25/2006US7081947 Lithographic apparatus and device manufacturing method
07/25/2006US7081946 Holding apparatus, holding method, exposure apparatus and device manufacturing method
07/25/2006US7081945 Device manufacturing method, device manufactured thereby and lithographic apparatus therefor
07/25/2006US7081944 Lithographic projection apparatus and device manufacturing method utilizing two arrays of focusing elements
07/25/2006US7081938 Electro-optical device and method for manufacturing the same
07/25/2006US7081931 Liquid crystal display having aluminum wiring
07/25/2006US7081930 Process for fabrication of a liquid crystal display with thin film transistor array free from short-circuit
07/25/2006US7081799 Bipolar transistor, oscillation circuit, and voltage controlled oscillator
07/25/2006US7081780 Reset circuitry for an integrated circuit
07/25/2006US7081778 Semiconductor integrated circuit related to a circuit operating on the basis of a clock signal
07/25/2006US7081770 Multiple testing bars for testing liquid crystal display and method thereof
07/25/2006US7081769 Method of identifying and analyzing semiconductor chip defects
07/25/2006US7081766 Probe card for examining semiconductor devices on semiconductor wafers
07/25/2006US7081758 Inspection pattern, inspection method, and inspection system for detection of latent defect of multi-layer wiring structure
07/25/2006US7081756 Substrate inspection apparatus, substrate inspection method, method of manufacturing semiconductor device and recording medium
07/25/2006US7081681 Semiconductor integrated circuit device for preventing warping of an insulating film therein
07/25/2006US7081680 Self-aligned corrosion stop for copper C4 and wirebond
07/25/2006US7081679 Structure and method for reinforcing a bond pad on a chip
07/25/2006US7081676 Structure for controlling the interface roughness of cobalt disilicide
07/25/2006US7081674 substrates with a polyelectrolyte layer covered with a conductive metal layer; serves to prevent the migration of material from the conductive layer to the underlying substrate and further provides improved adhesion of the conductive layer; integrated circuits
07/25/2006US7081673 Multilayered cap barrier in microelectronic interconnect structures
07/25/2006US7081669 Device and system for heat spreader with controlled thermal expansion
07/25/2006US7081668 Flip chip molded/exposed die process and package structure
07/25/2006US7081667 Power LED package
07/25/2006US7081666 Lead frame structure with aperture or groove for flip chip in a leaded molded package
07/25/2006US7081664 Doped semiconductor powder and preparation thereof
07/25/2006US7081659 Semiconductor apparatus having a built-in electric coil and a method of making the semiconductor apparatus
07/25/2006US7081656 CMOS constructions
07/25/2006US7081655 Formation of abrupt junctions in devices by using silicide growth dopant snowplow effect
07/25/2006US7081653 Semiconductor memory device having mis-type transistors
07/25/2006US7081652 Semiconductor device having a side wall insulating film and a manufacturing method thereof
07/25/2006US7081651 Non-volatile memory device with protruding charge storage layer and method of fabricating the same
07/25/2006US7081649 Semiconductor integrated circuitry and method for manufacturing the circuitry
07/25/2006US7081647 Microelectromechanical system and method for fabricating the same
07/25/2006US7081646 Semiconductor device and method of fabricating same
07/25/2006US7081642 Active matrix substrate display device
07/25/2006US7081640 Organic semiconductor element having high insulation strength and fabrication method thereof
07/25/2006US7081639 Semiconductor photodetection device and fabrication process thereof
07/25/2006US7081634 Variably shaped beam EB writing system
07/25/2006US7081633 Apparatus, method and program for ion implantation simulation, and computer readable storage medium having stored therein the program
07/25/2006US7081630 Compact microcolumn for automated assembly
07/25/2006US7081610 System for compensating for dark current in sensors
07/25/2006US7081422 Manufacturing process for annealed wafer and annealed wafer
07/25/2006US7081421 Atomic layer deposition by pulsing with an lanthanum precursor and hydrogen; depositing conductive ruthenium oxide films; capacitors, transistors, memory devices, and microelectronic systems; replacing silicon dioxide in integrated circuit
07/25/2006US7081420 Method for preparing SiC crystal and SiC crystal
07/25/2006US7081419 Gate dielectric structure for reducing boron penetration and current leakage
07/25/2006US7081418 Method of fabricating a multi-layered thin film by using photolysis chemical vapor deposition
07/25/2006US7081417 Manufacturing method for electronic device and multiple layer circuits thereof
07/25/2006US7081416 Methods of forming field effect transistor gates
07/25/2006US7081415 Method of dry plasma etching semiconductor materials
07/25/2006US7081414 Deposition-selective etch-deposition process for dielectric film gapfill
07/25/2006US7081413 Method and structure for ultra narrow gate
07/25/2006US7081412 Double-sided etching technique for semiconductor structure with through-holes
07/25/2006US7081411 Wafer etching techniques
07/25/2006US7081410 Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization
07/25/2006US7081409 Methods of producing integrated circuit devices utilizing tantalum amine derivatives
07/25/2006US7081408 Method of creating a tapered via using a receding mask and resulting structure
07/25/2006US7081407 Method of preventing damage to porous low-k materials during resist stripping
07/25/2006US7081406 Interconnect dielectric tuning
07/25/2006US7081405 Package module for an IC device and method of forming the same
07/25/2006US7081404 Methods of selectively bumping integrated circuit substrates and related structures
07/25/2006US7081403 Thin leadless plastic chip carrier
07/25/2006US7081402 Semiconductor package substrate having contact pad protective layer formed thereon and method for fabricating the same
07/25/2006US7081401 Method of fabricating a p-type ohmic electrode in gallium nitride based optical device
07/25/2006US7081400 Method for manufacturing polysilicon layer and method for manufacturing thin film transistor thereby
07/25/2006US7081399 Method for producing a high quality useful layer on a substrate utilizing helium and hydrogen implantations
07/25/2006US7081398 Methods of forming a conductive line
07/25/2006US7081397 Forming a lateral implant mask over a top surface of the semiconductor substrate, implanting a heavy dopant concentration into the substrate to form a lateral implant regionin the substrate, stripping, forming an epitaxial silicon layer, forming trench mask, etching
07/25/2006US7081396 Method for manufacturing device isolation film of semiconductor device
07/25/2006US7081395 Silicon strain engineering accomplished via use of specific shallow trench isolation fill materials
07/25/2006US7081394 Device for electrostatic discharge protection and method of manufacturing the same
07/25/2006US7081393 Reduced dielectric constant spacer materials integration for high speed logic gates
07/25/2006US7081392 Method for fabricating a gate structure of a FET and gate structure of a FET
07/25/2006US7081391 Integrated circuit devices having buried insulation layers and methods of forming the same
07/25/2006US7081390 Semiconductor device and a method of manufacturing the same
07/25/2006US7081389 Semiconductor devices having dual capping layer patterns and methods of manufacturing the same
07/25/2006US7081388 Self aligned contact structure for trench device
07/25/2006US7081387 Damascene gate multi-mesa MOSFET
07/25/2006US7081386 Semiconductor device and method of manufactuing the same
07/25/2006US7081385 Nanotube semiconductor devices and methods for making the same
07/25/2006US7081384 Method of forming a silicon dioxide layer
07/25/2006US7081383 Method for fabricating memory cells and memory cell array
07/25/2006US7081382 Trench device structure with single-side buried strap and method for fabricating the same
07/25/2006US7081381 Flash memory cell and the method of making separate sidewall oxidation
07/25/2006US7081380 Method of forming a conductive pattern of a semiconductor device and method of manufacturing a non-volatile semiconductor memory device using the same
07/25/2006US7081379 Local interconnect for integrated circuit
07/25/2006US7081378 Horizontal TRAM and method for the fabrication thereof
07/25/2006US7081377 Three-dimensional memory