Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2006
07/13/2006WO2006073115A1 Silicon-containing photosensitive composition, method for forming thin film pattern using same, protective film for electronic device, gate insulating film and thin film transistor
07/13/2006WO2006073098A1 Method and device for breaking work, method for scribing and breaking work, and scribing device with breaking function
07/13/2006WO2006073094A1 Process for producing group iii nitride substrate
07/13/2006WO2006073063A1 Method and apparatus for measuring thin film sample, and method and apparatus for manufacturing thin film sample
07/13/2006WO2006072975A1 Semiconductor device and method for manufacturing the same
07/13/2006WO2006072900A1 Thin film transistor array devices
07/13/2006WO2006072717A1 Device and method for controlling etching depth during alternate plasma etching of semiconductor substrates
07/13/2006WO2006072598A1 Method and device for testing semiconductor wafers using a chuck device whose temperature can be regulated
07/13/2006WO2006072512A1 Method for producing an electronic circuit
07/13/2006WO2006072493A1 Method for producing semiconductor chips from a wafer
07/13/2006WO2006072453A1 Holder with porous gripper
07/13/2006WO2006072422A1 Gripper for holding and positioning a disc- or plate-shaped object and method for holding and positioning a disc- or plate-shaped object
07/13/2006WO2006072238A2 Electrical determination of the connection quality of a bonded wafer connection
07/13/2006WO2006061205A3 Method and device for etching substrates received in an etching solution
07/13/2006WO2006039597A3 Metal gate transistors with epitaxial source and drain regions
07/13/2006WO2006039438A3 Split thin film capacitor for multiple voltages
07/13/2006WO2006037711A3 Semiconductor component
07/13/2006WO2006036453A3 Non-volatile nand memory with asymmetrical doping profile
07/13/2006WO2006036366A3 Method of forming a solution processed device
07/13/2006WO2006029802A3 Integrated semiconductor cascode circuit for high-frequency applications
07/13/2006WO2006025967A3 Semiconductor processing using energized hydrogen gas and in combination with wet cleaning
07/13/2006WO2006020688A3 Methods and apparatus for adjusting belt tension of a scrubber
07/13/2006WO2006019603A3 Thin tungsten silicide layer deposition and gate metal integration
07/13/2006WO2006011632A3 Semiconductor device including a conductive layer buried in an opening and method of manufacturing the same
07/13/2006WO2005072089A3 Controlled nanowire in permanent integrated nano-templates and method of fabricating sensor and transducer structures
07/13/2006WO2005060676B1 A method for manufacturing a superjunction device with wide mesas
07/13/2006WO2005049269A3 Chemical mechanical planarization pad
07/13/2006US20060156267 Recording medium recording a wiring method
07/13/2006US20060156263 Method for designing semiconductor device and method for evaluating reliability thereof
07/13/2006US20060156095 Fault detecting method and layout method for semiconductor integrated circuit
07/13/2006US20060156082 Signal dividing circuit and semiconductor device
07/13/2006US20060155414 Semiconductor manufacturing apparatus
07/13/2006US20060155413 Semiconductor fabricating apparatus
07/13/2006US20060155412 Substrate processing system and substrate processing program
07/13/2006US20060154839 Stripping and cleaning compositions for microelectronics
07/13/2006US20060154838 a chelating agent or a salt such as ethylenediaminetetraethylenephosphonic acid; ethylenediaminetetramethylenephosphonic acid potassium salt etc.; water and a hydroxide selected from NaOH, KOH, and LiOH; for cleaning semiconductor substrate surface
07/13/2006US20060154837 Technique on ozone water for use in cleaning semiconductor substrate
07/13/2006US20060154570 Monitoring a metal layer during chemical mechanical polishing
07/13/2006US20060154568 Multilayer polishing pad and method of making
07/13/2006US20060154495 Device for cleaning the surface of a component
07/13/2006US20060154494 High-throughput HDP-CVD processes for advanced gapfill applications
07/13/2006US20060154493 Method for producing gate stack sidewall spacers
07/13/2006US20060154492 Forming method of low dielectric constant insulating film of semiconductor device, semiconductor device, and low dielectric constant insulating film forming apparatus
07/13/2006US20060154491 Method for reducing argon diffusion from high density plasma films
07/13/2006US20060154490 Liquid treating apparatus
07/13/2006US20060154489 Semiconductor base structure for molecular electronics and molecular electronic-based biosensor devices and a method for producing such a semiconductor base structure
07/13/2006US20060154488 Semiconductor device and fabrication process thereof
07/13/2006US20060154487 Etching process to avoid polysilicon notching
07/13/2006US20060154486 Low-pressure removal of photoresist and etch residue
07/13/2006US20060154485 Sacrificial layers comprising water-soluble compounds, uses and methods of production thereof
07/13/2006US20060154484 Method of removing a low-k layer and method of recycling a wafer using the same
07/13/2006US20060154483 Method of providing a structure using self-aligned features
07/13/2006US20060154482 Semiconductor device
07/13/2006US20060154481 Decreasing Metal-Silicide Oxidation During Wafer Queue Time
07/13/2006US20060154480 Vaporizer for cvd, solution voporizing cvd system and voporization method for cvd
07/13/2006US20060154479 Baking apparatus used in photolithography process, and method for controlling critical dimension of photoresist patterns using the same
07/13/2006US20060154478 Contact hole structures and contact structures and fabrication methods thereof
07/13/2006US20060154477 Polymer spacer formation
07/13/2006US20060154476 BIPOLAR TRANSISTOR WITH COLLECTOR HAVING AN EPITAXIAL Si:C REGION
07/13/2006US20060154475 Method for manufacturing an integrated circuit using a capping layer having a degree of reflectivity
07/13/2006US20060154474 Method of fabricating metal silicide layer
07/13/2006US20060154473 Semiconductor device and method of manufacturing the same
07/13/2006US20060154472 Etching method, program, computer readable storage medium and plasma processing apparatus
07/13/2006US20060154471 Dual damascene interconnections having low K layer with reduced damage arising from photoresist stripping
07/13/2006US20060154470 Integrated circuit having structural support for a flip-chip interconnect pad and method therefor
07/13/2006US20060154469 Method and apparatus for providing structural support for interconnect pad while allowing signal conductance
07/13/2006US20060154468 Manufacturing method of semiconductor device, semiconductor device, circuit board, electro-optic device, and electronic apparatus
07/13/2006US20060154467 Method for the production of a memory cell, memory cell and memory cell arrangement
07/13/2006US20060154466 Fabrication method for arranging ultra-fine particles
07/13/2006US20060154465 Method for fabricating interconnection line in semiconductor device
07/13/2006US20060154464 Semiconductor device and a method of fabricating a semiconductor device
07/13/2006US20060154463 Wiring patterns formed by selective metal plating
07/13/2006US20060154462 Method of manufacturing semiconductor device
07/13/2006US20060154461 Fully silicided field effect transistors
07/13/2006US20060154460 Self-aligned contact method
07/13/2006US20060154459 Manufacturing method which prevents abnormal gate oxidation
07/13/2006US20060154458 Method of forming ultra shallow junctions
07/13/2006US20060154457 Method for varying the uniformity of a dopant as it is placed in a substrate by varying the speed of the implant across the substrate
07/13/2006US20060154456 Crystallized semicoductor thin film manufacturing method and its manufacturing apparatus
07/13/2006US20060154455 Gallium nitride-based devices and manufacturing process
07/13/2006US20060154454 Method for fabricating gaN-based nitride layer
07/13/2006US20060154453 Method(s) of forming a thin layer
07/13/2006US20060154452 Silicon film, crystalline film and method for manufacturing the same
07/13/2006US20060154451 Epitaxial growth method
07/13/2006US20060154450 Semiconductor device and manufacturing method thereof
07/13/2006US20060154449 Method of laser processing a wafer
07/13/2006US20060154448 Soi component comprising margins for separation
07/13/2006US20060154447 Method for manufacturing semiconductor device
07/13/2006US20060154446 Method for fabricating semiconductor component with thnned substrate having pin contacts
07/13/2006US20060154445 Method for manufacturing soi wafer
07/13/2006US20060154444 Method of forming wiring
07/13/2006US20060154443 Bonding system having stress control
07/13/2006US20060154442 Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide
07/13/2006US20060154441 Method for forming a buried diffusion layer with reducing topography in a surface of a semiconductor substrate
07/13/2006US20060154440 Forming channel stop for deep trench isolation prior to deep trench etch
07/13/2006US20060154439 Method of fabricating semiconductor device
07/13/2006US20060154438 Method for manufacturing semiconductor device with trenches in substrate surface
07/13/2006US20060154437 Capacitor for semiconductor device and fabricating method thereof
07/13/2006US20060154436 Metal-insulator-metal capacitor and a fabricating method thereof
07/13/2006US20060154435 Method of fabricating trench isolation for trench-capacitor dram devices