Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2006
07/18/2006US7078733 Aluminum alloyed layered structure for an optical device
07/18/2006US7078727 Semiconductor device and its manufacturing method
07/18/2006US7078723 Microelectronic device with depth adjustable sill
07/18/2006US7078715 Lithographic apparatus and apparatus adjustment method
07/18/2006US7078714 Ion implanting apparatus
07/18/2006US7078712 In-situ monitoring on an ion implanter
07/18/2006US7078708 Lithographic apparatus and method of manufacturing a device and method of performing maintenance
07/18/2006US7078706 Chamber, exposure apparatus, and device manufacturing method
07/18/2006US7078690 Monitoring of contact hole production
07/18/2006US7078689 Integrated electron beam and contaminant removal system
07/18/2006US7078668 Photoelectric conversion apparatus
07/18/2006US7078655 Ceramic substrate, ceramic heater, electrostatic chuck and wafer prober for use in semiconductor producing and inspecting devices
07/18/2006US7078651 Thermal flux deposition by scanning
07/18/2006US7078649 Method of forming semiconductor thin-film and laser apparatus used therefore
07/18/2006US7078629 Multilayer wiring board
07/18/2006US7078371 For cleaning a substrate of semiconductor integrated circuits or liquid crystal display devices
07/18/2006US7078357 Method for manufacturing silicon wafer and silicon wafer
07/18/2006US7078356 Low K interlevel dielectric layer fabrication methods
07/18/2006US7078355 Semiconductor wafer; dispensing using pump; connecting to buffer tank; releasing, detection bubbles; rotating substrate
07/18/2006US7078354 Method of manufacturing semiconductor device having oxide films with different thickness
07/18/2006US7078353 Indirect bonding with disappearance of bonding layer
07/18/2006US7078352 Methods for selective integration of airgaps and devices made by such methods
07/18/2006US7078351 Photoresist intensive patterning and processing
07/18/2006US7078350 Methods for the optimization of substrate etching in a plasma processing system
07/18/2006US7078349 Method to form self-aligned floating gate to diffusion structures in flash
07/18/2006US7078348 Multilayer damascene structure; dielectric layer; one step process; depositing photoresist; patterning; etching
07/18/2006US7078347 Method for forming MOS transistors with improved sidewall structures
07/18/2006US7078346 High density plasma chemical vapor deposition process
07/18/2006US7078345 Method for manufacturing a semiconductor device
07/18/2006US7078344 Stress free etch processing in combination with a dynamic liquid meniscus
07/18/2006US7078343 Method of manufacturing compound semiconductor wafer
07/18/2006US7078342 Method of forming a gate stack
07/18/2006US7078341 Vapor deposition; overcoating semiconductor substrate
07/18/2006US7078340 Metal deposit process
07/18/2006US7078339 Method of forming metal line layer in semiconductor device
07/18/2006US7078337 Selective isotropic etch for titanium-based materials
07/18/2006US7078336 Method and system for fabricating a copper barrier layer with low dielectric constant and leakage current
07/18/2006US7078335 Formation of self-organized stacked islands for self-aligned contacts of low dimensional structures
07/18/2006US7078334 In situ hard mask approach for self-aligned contact etch
07/18/2006US7078333 Method to improve adhesion of dielectric films in damascene interconnects
07/18/2006US7078332 Method for manufacturing semiconductor device
07/18/2006US7078331 Method of forming redistribution bump and semiconductor chip and mount structure fabricated using the same
07/18/2006US7078330 Metal electrode and bonding method using the metal electrode
07/18/2006US7078329 Method of manufacturing silicon carbide semiconductor device
07/18/2006US7078328 Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride
07/18/2006US7078327 Self-aligned poly-metal structures
07/18/2006US7078326 Nucleation method for atomic layer deposition of cobalt on bare silicon during the formation of a semiconductor device
07/18/2006US7078325 Process for producing a doped semiconductor substrate
07/18/2006US7078324 Method of fabricating a semiconductor component with active regions separated by isolation trenches
07/18/2006US7078322 Method of manufacturing a thin film transistor
07/18/2006US7078321 Semiconductor device and method of manufacturing the same
07/18/2006US7078320 Partial wafer bonding and dicing
07/18/2006US7078319 Laser separated die with tapered sidewalls for improved light extraction
07/18/2006US7078318 Method for depositing III-V semiconductor layers on a non-III-V substrate
07/18/2006US7078317 Method and system for source switching and in-situ plasma bonding
07/18/2006US7078316 Substrate joining apparatus
07/18/2006US7078315 Method for eliminating inverse narrow width effects in the fabrication of DRAM device
07/18/2006US7078314 Memory device having improved periphery and core isolation
07/18/2006US7078313 Method for fabricating an integrated semiconductor circuit to prevent formation of voids
07/18/2006US7078312 Method for controlling etch process repeatability
07/18/2006US7078311 Substrate-embedded capacitor, production method thereof, and circuit board
07/18/2006US7078310 Method for fabricating a high density composite MIM capacitor with flexible routing in semiconductor dies
07/18/2006US7078309 Methods for producing a structured metal layer
07/18/2006US7078308 Method and apparatus for removing adjacent conductive and nonconductive materials of a microelectronic substrate
07/18/2006US7078307 Method for manufacturing single-sided buried strap in semiconductor devices
07/18/2006US7078306 Method for forming a thin film resistor structure
07/18/2006US7078305 High value split poly P-resistor with low standard deviation
07/18/2006US7078304 Method for producing an electrical circuit
07/18/2006US7078303 Method for manufacturing semiconductor device having thick insulating layer under gate side walls
07/18/2006US7078302 Gate electrode dopant activation method for semiconductor manufacturing including a laser anneal
07/18/2006US7078301 Rare earth metal oxide memory element based on charge storage and method for manufacturing same
07/18/2006US7078300 Thin germanium oxynitride gate dielectric for germanium-based devices
07/18/2006US7078299 Formation of finFET using a sidewall epitaxial layer
07/18/2006US7078298 Silicon-on-nothing fabrication process
07/18/2006US7078297 Memory with recessed devices
07/18/2006US7078296 Self-aligned trench MOSFETs and methods for making the same
07/18/2006US7078295 Self-aligned split-gate nonvolatile memory structure and a method of making the same
07/18/2006US7078294 Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structure
07/18/2006US7078293 Method for fabricating optical interference display cell
07/18/2006US7078292 Storage node contact forming method and structure for use in semiconductor memory
07/18/2006US7078291 Method for fabricating a deep trench capacitor
07/18/2006US7078290 Method for forming a top oxide with nitride liner
07/18/2006US7078289 Method for fabricating a deep trench capacitor of DRAM device
07/18/2006US7078288 Method of producing ferroelectric capacitor
07/18/2006US7078287 Method of manufacturing semiconductor device
07/18/2006US7078286 Process for fabricating a semiconductor device having electrically isolated low voltage and high voltage regions
07/18/2006US7078285 SiGe nickel barrier structure employed in a CMOS device to prevent excess diffusion of nickel used in the silicide material
07/18/2006US7078284 Method for forming a notched gate
07/18/2006US7078283 Process for providing ESD protection by using contact etch module
07/18/2006US7078282 Replacement gate flow facilitating high yield and incorporation of etch stop layers and/or stressed films
07/18/2006US7078281 Method of manufacturing a semiconductor device by providing a mirror in the attenuation region
07/18/2006US7078280 Vertical replacement-gate silicon-on-insulator transistor
07/18/2006US7078279 Manufacturing method of a thin film transistor array substrate
07/18/2006US7078278 Dual-metal CMOS transistors with tunable gate electrode work function and method of making the same
07/18/2006US7078277 Semiconductor device and method for manufacturing the same
07/18/2006US7078276 Nanoparticles and method for making the same
07/18/2006US7078275 Semiconductor device and manufacturing method for same
07/18/2006US7078274 Method of forming active matrix type display including a metal layer having a light shield function
07/18/2006US7078273 Semiconductor memory cell and method of forming same
07/18/2006US7078272 Wafer scale integration packaging and method of making and using the same