Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2006
08/03/2006US20060172523 Method for delineating a conducting element which is disposed on an insulating layer, and device and transistor thus obtained
08/03/2006US20060172522 Method of fine patterning a metal layer
08/03/2006US20060172521 Method for allocating resources in heterogeneous nanowire crossbars having defective nanowisre junctions
08/03/2006US20060172520 System and method for photolithography in semiconductor manufacturing
08/03/2006US20060172519 Method for eliminating polycide voids through nitrogen implantation
08/03/2006US20060172518 Method of patterning a layer of a material
08/03/2006US20060172517 Method for plasma-enhanced physical vapor deposition of copper with RF source power applied to the target
08/03/2006US20060172516 Electronic device comprising a gate electrode including a metal-containing layer having one or more impurities and a process for forming the same
08/03/2006US20060172515 Method of fabricating a structure in a material
08/03/2006US20060172514 Reducing wire erosion during damascene processing
08/03/2006US20060172513 Method for producing semiconductor light emitting device, method for producing semiconductor device, method for producing device, method for growing nitride type iii-v group compound semiconductor layer, method for growing semiconductor layer, and method for growing layer
08/03/2006US20060172512 Substrate of gallium nitride single crystal and process for producing the same
08/03/2006US20060172511 In situ formed halo region in a transistor device
08/03/2006US20060172510 Fabrication of stacked microelectronic devices
08/03/2006US20060172509 Method for reducing stress concentrations on a semiconductor wafer by surface laser treatment
08/03/2006US20060172508 Process for transfer of a thin layer formed in a substrate with vacancy clusters
08/03/2006US20060172507 Method and system for 3D aligment in wafer scale integration
08/03/2006US20060172506 Process for producing a semiconductor chip
08/03/2006US20060172505 Structure and method of integrating compound and elemental semiconductors for high-performace CMOS
08/03/2006US20060172504 Fabrication process for increased capacitance in an embedded DRAM memory
08/03/2006US20060172503 Methods of forming silicide
08/03/2006US20060172502 Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps
08/03/2006US20060172501 Method of manufacturing semiconductor device
08/03/2006US20060172500 Stucture and method to induce strain in a semiconductor device channel with stressed film under the gate
08/03/2006US20060172499 Structure and method for thin box soi device
08/03/2006US20060172498 Semiconductor device having high dielectric constant gate insulating layer and its manufacture method
08/03/2006US20060172497 Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication
08/03/2006US20060172496 DOUBLE-GATE FETs (FIELD EFFECT TRANSISTORS)
08/03/2006US20060172495 STRUCTURE AND METHOD FOR MANUFACTURING PLANAR STRAINED Si/SiGe SUBSTRATE WITH MULTIPLE ORIENTATIONS AND DIFFERENT STRESS LEVELS
08/03/2006US20060172494 Method for the production of a semiconductor component
08/03/2006US20060172493 Forming multi-layer memory arrays
08/03/2006US20060172492 MOS transistor with fully silicided gate
08/03/2006US20060172491 Non-volatile memory structure and method of fabricating non-volatile memory
08/03/2006US20060172490 Method of improving flash memory performance
08/03/2006US20060172489 Method for producing a dielectric material on a semiconductor device and semiconductor device
08/03/2006US20060172488 Semiconductor device manufacturing method
08/03/2006US20060172487 High density fet with self-aligned source atop the trench
08/03/2006US20060172486 Selective etching to increase trench surface area
08/03/2006US20060172485 Systems and methods for forming metal oxides using alcohols
08/03/2006US20060172484 Method of forming a thin layer and method of manufacturing a flash memory device and a capacitor using the same
08/03/2006US20060172483 DRAM arrays, vertical transistor structures and methods of forming transistor structures and DRAM arrays
08/03/2006US20060172482 Semiconductor integrated circuit device having single-element type non-volatile memory elements
08/03/2006US20060172481 Systems and methods that selectively modify liner induced stress
08/03/2006US20060172480 Single metal gate CMOS device design
08/03/2006US20060172479 Method of forming buried isolation regions in semiconductor substrates and semiconductor devices with buried isolation regions
08/03/2006US20060172478 Method for manufacturing integrated circuit having at least one silicon-germanium heterobipolar transistor
08/03/2006US20060172476 Fin field effect transistor and method for manufacturing fin field effect transistor
08/03/2006US20060172475 Ultrathin SOI transistor and method of making the same
08/03/2006US20060172474 Method for fabricating a semiconductor device
08/03/2006US20060172473 Method of forming a two-layer gate dielectric
08/03/2006US20060172472 Thin film transistor array panel and manufacturing method thereof
08/03/2006US20060172471 Semiconductor device
08/03/2006US20060172470 Method of manufacturing thin film element
08/03/2006US20060172469 Method of fabricating a polycrystalline silicon thin film transistor
08/03/2006US20060172468 Method of making a planar double-gated transistor
08/03/2006US20060172467 Strained silicon devices transfer to glass for display applications
08/03/2006US20060172466 Semiconductor device and a method of manufacturing the same
08/03/2006US20060172465 Device packages
08/03/2006US20060172464 Method of embedding semiconductor element in carrier and embedded structure thereof
08/03/2006US20060172463 Semiconductor multi-package module having wire bond interconnect between stacked packages
08/03/2006US20060172462 Semiconductor multi-package module having inverted land grid array (LGA) package stacked over ball grid array (BGA) package
08/03/2006US20060172461 Semiconductor stacked multi-package module having inverted second package
08/03/2006US20060172460 Semiconductor device and method of manufacture thereof, circuit board and electronic instrument
08/03/2006US20060172459 Semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA) package
08/03/2006US20060172458 Placement method of an electronic module on a substrate and device produced by said method
08/03/2006US20060172457 Chip-stacked semiconductor package and method for fabricating the same
08/03/2006US20060172456 Device packages having stable wirebonds
08/03/2006US20060172455 Making multicolor OLED displays
08/03/2006US20060172454 Molybdenum alloy
08/03/2006US20060172453 Image sensor and manufacturing method of image sensor
08/03/2006US20060172452 Detector
08/03/2006US20060172451 Image sensor and related method of fabrication
08/03/2006US20060172450 Manufacturing method for image pickup apparatus
08/03/2006US20060172449 Method for manufacturing semiconductor laser diode
08/03/2006US20060172448 Screen printable electrode for light emitting polymer device
08/03/2006US20060172447 Multi-layer registration and dimensional test mark for scatterometrical measurement
08/03/2006US20060172446 Semiconductor laser with a weakly coupled grating
08/03/2006US20060172445 Method for determining properties of a film, and apparatus for realizing the method
08/03/2006US20060172444 Efficient method of forming and assembling a microelectronic chip including solder bumps
08/03/2006US20060172443 Method to detect and predict metal silicide defects in a microelectronic device during the manufacture of an integrated circuit
08/03/2006US20060172442 Semiconductor production system and semiconductor production process
08/03/2006US20060172441 Resist application method and device
08/03/2006US20060172440 Transistor-level signal cutting method and structure
08/03/2006US20060172439 Method of fabricating mram cells
08/03/2006US20060172229 Alignment system used in nano-imprint lithography and nano imprint lithography method using the alignment system
08/03/2006US20060172205 Etching, photoresists; latent imaging
08/03/2006US20060172088 Exposing a conductively doped silicon surface to TiCl4 without exposing it to any measurable silane for a first period of time and then exposing the surface to a mixture of TiCl4 and a silane for a second period of time
08/03/2006US20060172087 Plasma enhanced chemical vapor deposition method of forming titanium silicide comprising layers
08/03/2006US20060172079 Methods of forming intermediate semiconductor device structures using spin-on, photopatternable, interlayer dielectric materials
08/03/2006US20060171561 Wireless substrate-like sensor
08/03/2006US20060171283 Method and apparatus for decoding data in a layered modulation system
08/03/2006US20060171203 Novel monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
08/03/2006US20060171196 Method for writing to magnetoresistive memory cells and magnetoresistive memory which can be written to by the method
08/03/2006US20060171195 Semiconductor memory device
08/03/2006US20060171116 Integrated coolant circuit arrangement, operating method and production method
08/03/2006US20060171101 Electric double layer capacitor
08/03/2006US20060171020 Objective with fluoride crystal lenses
08/03/2006US20060170901 Polarization-modulating element, illumination optical apparatus, exposure apparatus, and exposure method
08/03/2006US20060170897 Projection exposure system
08/03/2006US20060170891 Exposure apparatus, exposure method, and method for producing device