Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2007
05/08/2007US7215011 Flip chip in leaded molded package and method of manufacture thereof
05/08/2007US7215010 Device for packing electronic components using injection molding technology
05/08/2007US7215008 In-line apparatus and method for manufacturing double-sided stacked multi-chip packages
05/08/2007US7215005 Bipolar ESD protection structure
05/08/2007US7215003 Driver for driving a load using a charge pump circuit
05/08/2007US7215001 Semiconductor device and method of manufacturing the same
05/08/2007US7214993 Non-planar transistor having germanium channel region and method of manufacturing the same
05/08/2007US7214991 CMOS inverters configured using multiple-gate transistors
05/08/2007US7214989 Semiconductor device and semiconductor integrated circuit device
05/08/2007US7214987 Semiconductor device having two different operation modes employing an asymmetrical buried insulating layer and method for fabricating the same
05/08/2007US7214986 Semiconductor device, manufacturing method thereof, and display device
05/08/2007US7214985 Integrated circuit incorporating higher voltage devices and low voltage devices therein
05/08/2007US7214984 High-breakdown-voltage insulated gate semiconductor device
05/08/2007US7214981 Semiconductor devices having double-sided hemispherical silicon grain electrodes
05/08/2007US7214979 Selectively deposited silicon oxide layers on a silicon substrate
05/08/2007US7214978 Semiconductor fabrication that includes surface tension control
05/08/2007US7214977 Ferroelectric thin film, method of manufacturing the same, ferroelectric memory device and ferroelectric piezoelectric device
05/08/2007US7214972 Strained silicon-channel MOSFET using a damascene gate process
05/08/2007US7214965 Thin film transistor array panel and method of manufacturing the same
05/08/2007US7214962 Apparatus and methods of testing and assembling bumped devices using an anisotropically conductive layer
05/08/2007US7214961 Semiconductor testing device and semiconductor testing method
05/08/2007US7214951 Charged-particle multi-beam exposure apparatus
05/08/2007US7214937 Electron microscope
05/08/2007US7214887 Electronic circuit connecting structure, and its connecting method
05/08/2007US7214743 Co-polycondensation product of phenol derivative and a cycloaliphatic hydrocarbon such as dicyclopentadiene; antireflection film for exposure with short wavelength; transparency, etching resistance; lithography
05/08/2007US7214733 Positive type resist composition
05/08/2007US7214631 Method of forming gate dielectric layer
05/08/2007US7214630 PMOS transistor with compressive dielectric capping layer
05/08/2007US7214629 Strain-silicon CMOS with dual-stressed film
05/08/2007US7214628 Plasma gate oxidation process using pulsed RF source power
05/08/2007US7214627 Graded junction termination extensions for electronic devices
05/08/2007US7214626 Etching process for decreasing mask defect
05/08/2007US7214625 Method for manufacturing movable portion of semiconductor device
05/08/2007US7214624 Resist pattern forming method, magnetic recording medium manufacturing method and magnetic head manufacturing method
05/08/2007US7214623 Planarization system and method using a carbonate containing fluid
05/08/2007US7214622 Manufacturing method of semiconductor device
05/08/2007US7214621 Methods of forming devices associated with semiconductor constructions
05/08/2007US7214620 Methods of forming silicide films with metal films in semiconductor devices and contacts including the same
05/08/2007US7214619 Method for forming a barrier layer in an integrated circuit in a plasma with source and bias power frequencies applied through the workpiece
05/08/2007US7214618 Technique for high efficiency metalorganic chemical vapor deposition
05/08/2007US7214617 Method of forming thin film pattern, method of manufacturing device, electro-optical apparatus and electronic apparatus
05/08/2007US7214616 Homojunction semiconductor devices with low barrier tunnel oxide contacts
05/08/2007US7214615 Method of manufacturing semiconductor device, semiconductor device, circuit substrate and electronic apparatus
05/08/2007US7214614 System for controlling metal formation processes using ion implantation
05/08/2007US7214613 Cross diffusion barrier layer in polysilicon
05/08/2007US7214612 Dual damascene structure and fabrication thereof
05/08/2007US7214611 Imprinting-damascene process for metal interconnection
05/08/2007US7214610 Process for producing aluminum-filled contact holes
05/08/2007US7214609 Methods for forming single damascene via or trench cavities and for forming dual damascene via cavities
05/08/2007US7214608 Interlevel dielectric layer and metal layer sealing
05/08/2007US7214607 Compliant wirebond pedestal
05/08/2007US7214606 Method of fabricating a wire bond with multiple stitch bonds
05/08/2007US7214605 Deposition of diffusion barrier
05/08/2007US7214604 Method of fabricating ultra thin flip-chip package
05/08/2007US7214603 Method for fabricating interconnect structures with reduced plasma damage
05/08/2007US7214602 Method of forming a conductive structure
05/08/2007US7214601 Manufacturing process and structure of power junction field effect transistor
05/08/2007US7214600 Method to improve transmittance of an encapsulating film
05/08/2007US7214599 High yield method for preparing silicon nanocrystal with chemically accessible surfaces
05/08/2007US7214598 Formation of lattice-tuning semiconductor substrates
05/08/2007US7214597 Electronic components and method of fabricating the same
05/08/2007US7214596 Method for the fabrication of isolation structures
05/08/2007US7214595 Method of producing semiconductor devices
05/08/2007US7214594 Method of making semiconductor device using a novel interconnect cladding layer
05/08/2007US7214593 Passivation for improved bipolar yield
05/08/2007US7214592 Method and apparatus for forming a semiconductor substrate with a layer structure of activated dopants
05/08/2007US7214591 Method of fabricating high-voltage MOS device
05/08/2007US7214590 Method of forming an electronic device
05/08/2007US7214589 Flash memory cell and methods for fabricating same
05/08/2007US7214588 Methods of forming memory cells with nonuniform floating gate structures
05/08/2007US7214587 Method for fabricating a semiconductor memory cell
05/08/2007US7214586 Methods of fabricating nonvolatile memory device
05/08/2007US7214585 Methods of fabricating integrated circuits with openings that allow electrical contact to conductive features having self-aligned edges
05/08/2007US7214584 Method for forming semiconductor device capable of preventing bunker defect
05/08/2007US7214583 Memory cell with an asymmetric crystalline structure
05/08/2007US7214582 Semiconductor substrate and semiconductor circuit formed therein and fabrication methods
05/08/2007US7214581 Method of fabricating flash memory device
05/08/2007US7214580 Semiconductor device and method of manufacturing the same
05/08/2007US7214579 Self-aligned 2-bit “double poly CMP” flash memory cell
05/08/2007US7214578 Method for fabricating semiconductor device
05/08/2007US7214577 Method of fabricating semiconductor integrated circuit device
05/08/2007US7214576 Manufacturing method of semiconductor device
05/08/2007US7214575 Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors
05/08/2007US7214574 Heating treatment device, heating treatment method and fabrication method of semiconductor device
05/08/2007US7214573 Method of manufacturing a semiconductor device that includes patterning sub-islands
05/08/2007US7214572 Semiconductor memory device and manufacturing method thereof
05/08/2007US7214571 Electromechanical electron transfer devices
05/08/2007US7214570 Encapsulating a device
05/08/2007US7214569 Apparatus incorporating small-feature-size and large-feature-size components and method for making same
05/08/2007US7214568 Semiconductor device configured for reducing post-fabrication damage
05/08/2007US7214567 Method of producing semiconductor package, apparatus for producing semiconductor package, and adhesive film
05/08/2007US7214566 Semiconductor device package and method
05/08/2007US7214565 Manufacturing method of an electronic part built-in substrate
05/08/2007US7214563 IC chip mounting method
05/08/2007US7214562 Method for encapsulating lead frame packages
05/08/2007US7214561 Packaging assembly and method of assembling the same
05/08/2007US7214559 Method for fabricating vertical offset structure
05/08/2007US7214558 Method for forming patterns on a semiconductor device using a lift off technique
05/08/2007US7214557 Light receiving or light emitting modular sheet and process for producing the same
05/08/2007US7214556 Method for forming alignment layer of LCD
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