| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 05/03/2007 | US20070096197 Non-volatile memory devices including etching protection layers and methods of forming the same |
| 05/03/2007 | US20070096196 Fin field effect transistor arrangement and method for producing a fin field effect transistor arrangement |
| 05/03/2007 | US20070096195 Technique for providing multiple stress sources in nmos and pmos transistors |
| 05/03/2007 | US20070096194 Technique for strain engineering in si-based transistors by using embedded semiconductor layers including atoms with high covalent radius |
| 05/03/2007 | US20070096192 Capacitor of semiconductor device and method of fabricating the same |
| 05/03/2007 | US20070096191 Coupling capacitor and semiconductor memory device using the same |
| 05/03/2007 | US20070096190 Interconnect line selectively isolated from an underlying contact plug |
| 05/03/2007 | US20070096189 Semiconductor device |
| 05/03/2007 | US20070096185 Method of forming self-aligned inner gate recess channel transistor |
| 05/03/2007 | US20070096184 Semiconductor device and method for fabricating the same |
| 05/03/2007 | US20070096183 Semiconductor device and method for fabricating the same |
| 05/03/2007 | US20070096176 Pixel and imager device having high-k dielectrics in isolation structures |
| 05/03/2007 | US20070096175 Complementary MIS device |
| 05/03/2007 | US20070096171 Semiconductor laser device that has the effect of phonon-assisted light amplification and method for manufacturing the same |
| 05/03/2007 | US20070096165 In-situ wet chemical process monitor |
| 05/03/2007 | US20070096163 Transition metal alloys for use a gate electrode and device incorporating these alloys |
| 05/03/2007 | US20070096158 Pattern layout and layout data generation method |
| 05/03/2007 | US20070096151 Bipolar transistor and method for fabricating the same |
| 05/03/2007 | US20070096144 Integrated circuit using complementary junction field effect transistor and MOS transistor in silicon and silicon alloys |
| 05/03/2007 | US20070096137 Semiconductor device and method of manufacturing semiconductor device |
| 05/03/2007 | US20070096126 Gallium nitride-based compound semiconductor light-emitting device and negative electrode thereof |
| 05/03/2007 | US20070096119 Electrode structure and optical semiconductor element |
| 05/03/2007 | US20070096117 Nitride Semiconductor Wafer |
| 05/03/2007 | US20070096109 Semiconductor material, production method thereof and semiconductor device |
| 05/03/2007 | US20070096106 Semiconductor display device and method of manufacturing the same |
| 05/03/2007 | US20070096105 Methods of fabricating a semiconductor device using angled implantation |
| 05/03/2007 | US20070096104 Semiconductor device having a mis-type fet, and methods for manufacturing the same and forming a metal oxide film |
| 05/03/2007 | US20070096103 Semiconductor device, annealing method, annealing apparatus and display apparatus |
| 05/03/2007 | US20070096102 Liquid crystal display panel |
| 05/03/2007 | US20070096101 Method of manufacturing semiconductor light emitting device |
| 05/03/2007 | US20070096100 Thin film transistors |
| 05/03/2007 | US20070096097 Thin-film transistor, method of manufacturing the same, liquid crystal display panel having the same and electro-luminescence display panel having the same |
| 05/03/2007 | US20070096096 Electronic device and semiconductor device and method for manufacturing the same |
| 05/03/2007 | US20070096094 Methods and apparatus for designing and using micro-targets in overlay metrology |
| 05/03/2007 | US20070096093 Calibration technique for measuring gate resistance of power MOS gate device at wafer level |
| 05/03/2007 | US20070096079 Field effect transistor and production process thereof |
| 05/03/2007 | US20070096072 Lateral phase change memory |
| 05/03/2007 | US20070095806 Method of bonding optical component, and optical pickup |
| 05/03/2007 | US20070095791 Substrate processing apparatus and substrate processing method |
| 05/03/2007 | US20070095789 Method for automatic determination of semiconductor plasma chamber matching and source of fault by comprehensive plasma monitoring |
| 05/03/2007 | US20070095788 Method of controlling a chamber based upon predetermined concurrent behavoir of selected plasma parameters as a function of selected chamber paramenters |
| 05/03/2007 | US20070095787 Etching processes using c4f8 for silicon dioxide and cf4 for titanium nitride |
| 05/03/2007 | US20070095659 Electrolytic processing apparatus and electrolytic processing method |
| 05/03/2007 | US20070095654 Controlled multi-step magnetron sputtering process |
| 05/03/2007 | US20070095477 Plasma processing apparatus |
| 05/03/2007 | US20070095291 Holder for Use in Semiconductor or Liquid-Crystal Manufacturing Device and Semiconductor or Liquid-Crystal Manufacturing Device in Which the Holder Is Installed |
| 05/03/2007 | US20070095289 Heat treatment apparatus |
| 05/03/2007 | US20070095288 Thermal processing method and thermal processing unit |
| 05/03/2007 | US20070095284 Gas treating device and film forming device |
| 05/03/2007 | US20070095283 Pumping System for Atomic Layer Deposition |
| 05/03/2007 | US20070095282 Apparatus for manufacturing semiconductor device with pump unit and method for cleaning the pump unit |
| 05/03/2007 | US20070095280 Method and apparatus for attaching a workpiece to a workpiece support |
| 05/03/2007 | US20070095274 Silicon wafer and method for producing same |
| 05/03/2007 | US20070095273 Method for producing crystal of fluoride |
| 05/03/2007 | US20070094936 Abrasive slurry having high dispersion stability and manufacturing method for a substrate |
| 05/03/2007 | US20070094872 Method for mounting electronic component |
| 05/03/2007 | US20070094867 Bond Surface Conditioning System for Improved Bondability |
| 05/03/2007 | DE69034227T2 EEprom-System mit Blocklöschung EEprom system with block erase |
| 05/03/2007 | DE4320089B4 Verfahren zum Herstellen eines Kondensators einer Halbleiterspeicherzelle A method for manufacturing a capacitor of a semiconductor memory cell |
| 05/03/2007 | DE19822763B4 Leistungshalbleitervorrichtung und Herstellungsverfahren einer Leistungshalbleitervorrichtung Power semiconductor device and manufacturing method of a power semiconductor device |
| 05/03/2007 | DE19740947B4 Halbleitereinrichtung und Herstellungsverfahren derselben A semiconductor device and manufacturing method thereof |
| 05/03/2007 | DE19653219B4 Substrat für ein Halbleiterbauelement, Halbleiterbauelement sowie Verfahren zum Herstellen eines Substrats für ein Halbleiterbauelement und zum Herstellen eines Halbleiterbauelements A substrate for a semiconductor device, semiconductor device, and method for producing a substrate for a semiconductor device and for manufacturing a semiconductor device |
| 05/03/2007 | DE112005001414T5 Verfahren zur Herstellung eines Elektronikmoduls A process for producing an electronic module |
| 05/03/2007 | DE112005001048T5 Halbleitervorrichtung mit einer Abstandsschicht, die mit langsamer diffundierenden Atomen dotiert ist als das Substrat A semiconductor device having a spacer layer, which is doped with atoms diffusing slower than the substrate |
| 05/03/2007 | DE10362083B4 Verfahren zur Herstellung von Membranen mit durchgängigen Poren A process for the production of membranes with through pores |
| 05/03/2007 | DE10328343B4 Herstellungsverfahren für eine Halbleiterstruktur und entsprechende Halbleiterstruktur Manufacturing method of a semiconductor structure and corresponding semiconductor structure |
| 05/03/2007 | DE10233760B4 SRAM-Speicherzelle mit Älzgräben und deren Array-Anordnung SRAM memory cell having Älzgräben and its array arrangement |
| 05/03/2007 | DE102006050505A1 Interconnect making involves patterning protective layer to form openings to conductive layer, depositing contact pads comprising conductive material on the conductive layer, and patterning the conductive and protective layers |
| 05/03/2007 | DE102006046820A1 Chip-level packaging method for integrated circuit, involves bonding singulated die chip to cap wafer such that ends of conductive paths on cap wafer are electrically connected to respective electrical contact points on die chips |
| 05/03/2007 | DE102006043991A1 Production of a semiconductor especially a semiconductor laser comprises placing a substrate on a satellite and forming a thin alloy semiconductor layer on the substrate whilst thermal energy is fed to the substrate through the satellite |
| 05/03/2007 | DE102006041426A1 Production processes for a transistor in a semiconductor substrate and memory device defines isolation trenches and forms source, drain, channel and gate in active region and disc-shaped part regions in trenches |
| 05/03/2007 | DE102006003392A1 Non-volatile memory cells and production processes are formed on projection of semiconductor wafer with transistor connection regions and charging layers connected to a gate electrode |
| 05/03/2007 | DE102005052563A1 Semiconductor chip and production processes has adhesive-free three layer metallization with aluminum layer, diffusion blocking layer and diffusion solder layer |
| 05/03/2007 | DE102005052053A1 Semiconductor structure and production process for a dielectric barrier stack has metal region and dielectric layer of low dielectric constant and barrier layer stack having two layers |
| 05/03/2007 | DE102005052052A1 Semiconductor structure has metal region and dielectric layer of low dielectric constant with a three layer barrier stack of silicon carbide nitride and silicon nitride |
| 05/03/2007 | DE102005052001A1 Semiconductor component with transistor has contact plug in dielectric constant layer that comprises copper and is separated from the dielectric constant layer by a barrier layer containing tungsten |
| 05/03/2007 | DE102005051811A1 Semiconductor component with semiconductor chip in surface conductive frame technology has chip carrier on chip connection surface with metallic buffer layer and cover layer |
| 05/03/2007 | DE102005051417A1 Simulations- bzw. Layoutverfahren für vertikale Leistungstransistoren mit variierbarer Kanalweite und variierbarer Gate-Drain-Kapazität Simulation and layout method for vertical power transistors with variable channel width and diversifiable gate-drain capacitance |
| 05/03/2007 | DE102005051346A1 Substrate used for structuring wafers in the semiconductor industry comprises a shaping layer arranged on the substrate body and made from a material having a melting point less than the melting point of contact connections |
| 05/03/2007 | DE102005051330A1 Methods of producing and cleaning external contacts for surface-mounted chips and producing such chips tempers galvanically deposited layer followed by rapid thermal processing and moistening |
| 05/03/2007 | DE102005046736A1 Vorrichtung und Verfahren zum Beladen einer Sockel- bzw. Adapter-Einrichtung mit einem entsprechenden Halbleiter-Bauelement Apparatus and method for loading a socket or adapter device with a corresponding semiconductor device |
| 05/03/2007 | DE102005035420B4 Modular aufgebaute Vorrichtung zum Bestücken von Substraten Modular device for populating substrates |
| 05/03/2007 | DE102005002631B4 Mehrchippackung Multi-chip package |
| 05/03/2007 | DE102004033147B4 Planarer Doppel-Gate-Transistor und Verfahren zum Herstellen eines planaren Doppel-Gate-Transistors A planar double-gate transistor and method of manufacturing a planar double-gate transistor |
| 05/03/2007 | DE10043193B4 Prüfgerät für Halbleitersubstrate Tester for semiconductor substrates |
| 05/03/2007 | DE10000193B4 Optisches System Optical system |
| 05/03/2007 | CA2627222A1 Method for modifying insulating or semi-conductive surfaces, and resulting products |
| 05/03/2007 | CA2627193A1 Wire embedded bridge |
| 05/02/2007 | EP1780803A1 A method for applying at least one silicon containing layer onto an electron conductive layer |
| 05/02/2007 | EP1780794A1 Method for manufacturing bonded wafer |
| 05/02/2007 | EP1780788A1 Semiconductor device and method for manufacturing same |
| 05/02/2007 | EP1780787A2 Joining structure between ceramic substrate and power supply connector |
| 05/02/2007 | EP1780786A1 Stage apparatus, exposure apparatus, and exposure method |
| 05/02/2007 | EP1780785A1 Load port |
| 05/02/2007 | EP1780784A2 Batch forming apparatus, substrate processing system, batch forming method, and storage medium |
| 05/02/2007 | EP1780783A1 Methods for protecting metal surfaces |
| 05/02/2007 | EP1780782A1 Apparatus for producing ic chip package |
| 05/02/2007 | EP1780781A1 Process for producing silicon wafer and silicon wafer produced by the process |
| 05/02/2007 | EP1780780A2 A plasma composition for the selective etching of high-k materials |
| 05/02/2007 | EP1780779A2 A plasma for patterning advanced gate stacks |