Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2014
03/27/2014WO2014045709A1 Schedule preparation device, substrate processing device, schedule preparation program, schedule preparation method, and substrate processing method
03/27/2014WO2014045565A1 Plasma processing device and method
03/27/2014WO2014045550A1 Silicon carbide semiconductor device having junction barrier schottky diode
03/27/2014WO2014045547A1 Plasma processing device, and plasma processing method
03/27/2014WO2014045543A1 Thin film transistor, method for manufacturing same, and image display apparatus
03/27/2014WO2014045491A1 Wiring board and method for manufacturing same
03/27/2014WO2014045435A1 Method for producing semiconductor device, and semiconductor device
03/27/2014WO2014045252A1 Method for forming an epitaxial silicon layer
03/27/2014WO2014045139A1 Method of protecting an electrical component in a laminate
03/27/2014WO2014045106A1 Wafer cutting system
03/27/2014WO2014045090A1 Methods of forming iii-v semiconductor structures using multiple substrates, and semiconductor devices fabricated using such methods
03/27/2014WO2014044960A1 Optoelectronic device having semi-conductive microwires or nanowires and method for producing same
03/27/2014WO2014044925A1 A method of producing a photovoltaic device
03/27/2014WO2014044924A1 A method of modifying an n-type silicon substrate
03/27/2014WO2014044748A1 Nmos transistor and method for producing it
03/27/2014WO2014044684A1 Moulding method for producing an electronic housing
03/27/2014WO2014044545A1 Method for doping semiconductor substrates
03/27/2014WO2014044435A1 Manufacture of coated copper pillars
03/27/2014WO2014044122A1 Silicon etching method
03/27/2014WO2014044054A1 Tft array substrate, fabrication method thereof, and liquid crystal display device
03/27/2014WO2014043992A1 Method for manufacturing electrode of ips screen
03/27/2014WO2014043947A1 Semiconductor device and manufacturing method therefor
03/27/2014WO2014022844A3 In-vacuum high speed pre-chill and post-heat stations
03/27/2014WO2014022722A3 Epitaxial growth on thin lamina
03/27/2014WO2014009815A3 Group xiii selenide nanoparticles
03/27/2014WO2014007892A3 Nano-pillar transistor fabrication and use
03/27/2014WO2013182591A3 Bonding agent comprising ferromagnetic heating particles, method for bonding two bodies using the bonding agent by means of induction heating of the heating particles, and corresponding electronic assembly
03/27/2014US20140089609 Interposer having embedded memory controller circuitry
03/27/2014US20140087568 Method of cleaning, method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
03/27/2014US20140087567 Substrate processing apparatus and method of manufacturing semiconductor device
03/27/2014US20140087566 Pattern formation method
03/27/2014US20140087565 Method of Manufacturing Semiconductor Device, Substrate Processing Apparatus, and Non-Transitory Computer Readable Recording Medium
03/27/2014US20140087564 Plasama processing apparatus and plasma processing method
03/27/2014US20140087563 Method for positioning spacers in pitch multiplication
03/27/2014US20140087562 Method for processing silicon substrate and method for producing charged-particle beam lens
03/27/2014US20140087561 Method and apparatus for substrate transfer and radical confinement
03/27/2014US20140087560 Method of depositing metallic layers based on nickel or cobalt on a semiconducting solid substrate; kit for application of said method
03/27/2014US20140087559 Semiconductor structure and manufacturing method of the same
03/27/2014US20140087558 Methods of Forming Memory Cells; and Methods of Forming Vertical Structures
03/27/2014US20140087557 Through silicon via wafer, contacts and design structures
03/27/2014US20140087556 Method of manufacturing wiring substrate
03/27/2014US20140087555 Method of forming semiconductor device
03/27/2014US20140087554 Methods for forming arrays of small, closely spaced features
03/27/2014US20140087552 Method of forming a conductive polymer microstructure
03/27/2014US20140087551 Etching polysilicon
03/27/2014US20140087550 Methods of making semiconductor devices with low leakage schotky contacts
03/27/2014US20140087549 Method for forming patterned doping regions
03/27/2014US20140087548 Method of shielding through silicon vias in a passive interposer
03/27/2014US20140087547 Manufacturing method for semiconductor device, annealing device, and annealing method
03/27/2014US20140087545 Method for producing a group iii nitride semiconductor
03/27/2014US20140087544 Tin precursors for vapor deposition and deposition processes
03/27/2014US20140087543 Method for manufacturing soi substrate and semiconductor device
03/27/2014US20140087542 Semiconductor die singulation apparatus and method
03/27/2014US20140087541 Method for Manufacturing a Semiconductor Substrate, and Method for Manufacturing Semiconductor Devices Integrated in a Semiconductor Substrate
03/27/2014US20140087540 Method for forming trench isolation
03/27/2014US20140087538 Method for manufacturing semiconductor device
03/27/2014US20140087536 Semiconductor structure that reduces the effects of gate cross diffusion and method of forming the structure
03/27/2014US20140087532 Cmos transistor and method for fabricating the same
03/27/2014US20140087531 Two Step Poly Etch LDMOS Gate Formation
03/27/2014US20140087528 Printed Material Constrained By Well Structures And Devices Including Same
03/27/2014US20140087526 Multi-gate field effect transistor devices
03/27/2014US20140087523 Stacked nanowire field effect transistor
03/27/2014US20140087521 Wafer level chip scale packaging
03/27/2014US20140087520 Method of manufacturing semiconductor device
03/27/2014US20140087519 Package process and package structure
03/27/2014US20140087518 Method of manufacturing semiconductor device
03/27/2014US20140087516 Semiconductor device and method for manufacturing the same
03/27/2014US20140087492 Exclusion Zone for Stress-Sensitive Circuit Design
03/27/2014US20140087491 Wafer level bonding method for fabricating wafer level camera lenses
03/27/2014US20140087490 Method and Apparatus for Improving Particle Performance
03/27/2014US20140087489 Bottom and side plasma tuning having closed loop control
03/27/2014US20140087488 Showerhead electrode assembly in a capacitively coupled plasma processing apparatus
03/27/2014US20140087486 Method for etching with controlled wiggling
03/27/2014US20140087209 Method of growing group iii nitride crystals
03/27/2014US20140087180 Easily releasable adhesive film
03/27/2014US20140086720 Semiconductor processing station and method for processing semiconductor wafer
03/27/2014US20140086712 Transportng apparatus and processing apparatus
03/27/2014US20140086711 Vacuum treatment apparatus
03/27/2014US20140085973 Method, system and device for recessed contact in memory array
03/27/2014US20140085841 Circuit device and method of manufacturing the same
03/27/2014US20140085601 Contact lens having a chip integrated into a polymer substrate and method of manufacture
03/27/2014US20140084948 Test vehicles for evaluating resistance of thin layers
03/27/2014US20140084529 Wafer carrier with pocket
03/27/2014US20140084489 Assembling thin silicon chips on a contact lens
03/27/2014US20140084487 PoP STRUCTURE WITH ELECTRICALLY INSULATING MATERIAL BETWEEN PACKAGES
03/27/2014US20140084483 Package structure and manufacturing method thereof
03/27/2014US20140084481 System and method of novel encapsulated multi metal branch foot structures for advanced back end of line
03/27/2014US20140084480 Semiconductor package substrates having layered circuit segments and related methods
03/27/2014US20140084479 Integrated Circuit Formed Using Spacer-Like Copper Deposition
03/27/2014US20140084478 Mold chase for integrated circuit package assembly and associated techniques and configurations
03/27/2014US20140084475 Semiconductor package substrates having pillars and related methods
03/27/2014US20140084474 Method for forming a vertical electrical connection in a layered semiconductor structure
03/27/2014US20140084472 Compound dielectric anti-copper-diffusion barrier layer for copper connection and manufacturing method thereof
03/27/2014US20140084471 Interconnect Structures Comprising Flexible Buffer Layers
03/27/2014US20140084470 Seed Layer Structure and Method
03/27/2014US20140084469 Method of semiconductor integrated circuit fabrication
03/27/2014US20140084467 Forming functionalized carrier structures with coreless packages
03/27/2014US20140084466 Manganese silicate film forming method, processing system, semiconductor device manufacturing method and semiconductor device
03/27/2014US20140084465 System and method of novel mx to mx-2
03/27/2014US20140084464 Passivation Scheme
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