Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2007
06/14/2007US20070134935 Ultraviolet assisted pore sealing of porous low K dielectric films
06/14/2007US20070134934 Methods of forming capacitor constructions
06/14/2007US20070134933 Semiconductor substrate surface protection method
06/14/2007US20070134932 Methods of forming metal layers in the fabrication of semiconductor devices
06/14/2007US20070134931 Lanthanide yttrium aluminum oxide dielectric films
06/14/2007US20070134930 Micro and nano scale fabrication and manufacture by spatially selective deposition
06/14/2007US20070134929 Etching method and etching apparatus
06/14/2007US20070134928 Silicon wet etching method using parylene mask and method of manufacturing nozzle plate of inkjet printhead using the same
06/14/2007US20070134927 Method for removing residues formed during the manufacture of mems devices
06/14/2007US20070134926 Method of etching for multi-layered structure of semiconductors in groups III-V and method for manufacturing vertical cavity surface emitting laser device
06/14/2007US20070134925 Package using array capacitor core
06/14/2007US20070134924 Semiconductor device fabrication method
06/14/2007US20070134923 Method to form topography in a deposited layer above a substrate
06/14/2007US20070134922 Plasma etching method
06/14/2007US20070134921 Method of forming a semiconductor device having dummy features
06/14/2007US20070134920 Cu wiring formation method
06/14/2007US20070134919 Film forming method and apparatus
06/14/2007US20070134918 Bi-layer etch stop process for defect reduction and via stress migration improvement
06/14/2007US20070134917 Partial-via-first dual-damascene process with tri-layer resist approach
06/14/2007US20070134916 Antireflection film composition, patterning process and substrate using the same
06/14/2007US20070134915 Method of fabricating a metal line in a semiconductor device
06/14/2007US20070134914 Semiconductor memory device and method of fabricating the same
06/14/2007US20070134913 Method to eliminate Cu dislocation for reliability and yield
06/14/2007US20070134912 Method for fabricating semiconductor device
06/14/2007US20070134911 Dual damascene process and method for forming a copper interconnection layer using same
06/14/2007US20070134910 High-dielectric sheet, a printed circuit board having the high-dielectric sheet and production methods thereof
06/14/2007US20070134909 Method of making a contact in a semiconductor device
06/14/2007US20070134908 Fabrication of cooling and heat transfer systems by electroforming
06/14/2007US20070134907 Substrate processing method and fabrication process of a semiconductor device
06/14/2007US20070134906 Pixel detector and method of manufacture and assembly thereof
06/14/2007US20070134905 Method for mounting bumps on an under metallurgy layer
06/14/2007US20070134904 High precision die bonding apparatus
06/14/2007US20070134903 Integrated circuit having bond pad with improved thermal and mechanical properties
06/14/2007US20070134902 Patterning of Substrates with Metal-Containing Particles
06/14/2007US20070134901 Growth of GaAs expitaxial layers on Si substrate by using a novel GeSi buffer layer
06/14/2007US20070134900 Method of improving adhesion strength of low dielectric constant layers
06/14/2007US20070134899 Manufacture method for semiconductor device using damascene method
06/14/2007US20070134898 Semiconductor device manufacturing method
06/14/2007US20070134897 Process for producing schottky junction type semiconductor device
06/14/2007US20070134896 Method for fabricating a micro structure
06/14/2007US20070134895 Nitriding method of gate oxide film
06/14/2007US20070134894 Removable liners for charged particle beam systems
06/14/2007US20070134893 Method for fabricating image display device
06/14/2007US20070134892 Method of fabricating a poly-silicon thin film
06/14/2007US20070134891 SOI active layer with different surface orientation
06/14/2007US20070134890 Cutting method for substrate and cutting apparatus therefor
06/14/2007US20070134889 Cutting method for substrate
06/14/2007US20070134888 Back-gated semiconductor device with a storage layer and methods for forming thereof
06/14/2007US20070134887 Method of manufacturing a silicon dioxide layer
06/14/2007US20070134886 Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication
06/14/2007US20070134885 Method for manufacturing semiconductor substrate and method for manufacturing semiconductor device
06/14/2007US20070134884 Isolation method of defining active fins, method of fabricating semiconductor device using the same and semiconductor device fabricated thereby
06/14/2007US20070134883 Display device and a method of driving the same
06/14/2007US20070134882 Method for fabicating trench metal-oxide-semiconductor field effect transistor
06/14/2007US20070134881 Image display device manufacturing method and image display
06/14/2007US20070134880 Field effect transistors having elevated source/drain regions and methods of manufacturing the same
06/14/2007US20070134879 Semiconductor device and method of manufacturing the same
06/14/2007US20070134878 Non-planar microelectronic device having isolation element to mitigate fringe effects and method to fabricate same
06/14/2007US20070134877 Method of forming gate of flash memory device
06/14/2007US20070134876 Stacked thin film transistor, non-volatile memory devices and methods for fabricating the same
06/14/2007US20070134875 Multi-level memory cell array with lateral floating spacers
06/14/2007US20070134874 Method of forming dielectric layer of flash memory device
06/14/2007US20070134873 Dram cylindrical capacitor and method of fabricating the same
06/14/2007US20070134872 Methods of forming pluralities of capacitors
06/14/2007US20070134871 Memory chip having a memory cell with low-temperature layers in the memory trench and fabrication method
06/14/2007US20070134870 Method to enhance device performance with selective stress relief
06/14/2007US20070134869 Method for fabricating semiconductor device
06/14/2007US20070134868 Method of fabricating trap type nonvolatile memory device
06/14/2007US20070134867 Floating gate non-volatile memory and method thereof
06/14/2007US20070134866 Method for integrating carbon nanotube with CMOS chip into array-type microsensor
06/14/2007US20070134865 Semiconductor integrated circuit device and its manufacturing method
06/14/2007US20070134864 Method and structure to create multiple device widths in finfet technology in both bulk and soi
06/14/2007US20070134863 Fabrication method for semiconductor device
06/14/2007US20070134862 Method of fabricating pseudomorphic high electron mobility transistor
06/14/2007US20070134861 Semiconductor devices and methods of manufacture thereof
06/14/2007US20070134860 Methods and Structures for Planar and Multiple-Gate Transistors Formed on SOI
06/14/2007US20070134859 Strained silicon MOS device with box layer between the source and drain regions
06/14/2007US20070134858 Thin Film Transistor Array Panel and Manufacturing Method Thereof
06/14/2007US20070134857 Method of preparing organic thin film transistor, organic thin film transistor, and organic light-emitting display device including the organic thin film transistor
06/14/2007US20070134856 Method for fabricating reverse-staggered thin film transistor
06/14/2007US20070134855 A stacked non-volatile memory device and methods for fabricating the same
06/14/2007US20070134854 Self-aligned vertical PNP transistor for high performance SiGe CBiCMOS process
06/14/2007US20070134853 Power semiconductor device having reduced on-resistance and method of manufacturing the same
06/14/2007US20070134852 Layout method of power line for semiconductor integrated circuit and semiconductor integrated circuit manufactured by the layout method
06/14/2007US20070134851 Space-efficient package for laterally conducting device
06/14/2007US20070134850 Method of manufacturing wiring board
06/14/2007US20070134849 Method for embedding dies
06/14/2007US20070134848 Chip Module and Method for Producing a Chip Module
06/14/2007US20070134847 Die-attaching paste composition and method for hardening the same
06/14/2007US20070134846 Electronic member fabricating method and ic chip with adhesive material
06/14/2007US20070134845 Method of forming molded resin semiconductor device
06/14/2007US20070134844 Process for producing flip-chip type semiconductor device and semiconductor device produced by the process
06/14/2007US20070134843 Semiconductor device and method for fabricating the same
06/14/2007US20070134842 Manufacture method for ZnO based semiconductor crystal and light emitting device using same
06/14/2007US20070134841 Electrical and thermal contact for use in semiconductor devices and corresponding methods
06/14/2007US20070134840 Methods of making energy conversion devices with a substantially contiguous depletion regions
06/14/2007US20070134839 Method for making a diaphragm unit of a condenser microphone
06/14/2007US20070134838 Semiconductor device with a resonator
06/14/2007US20070134837 Surface shape recognition sensor and method of fabricating the same
06/14/2007US20070134836 Solid State Image Sensing Device and Manufacturing and Driving Methods Thereof
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