Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2007
10/18/2007WO2007116527A1 Foup door positioning device for foup opener
10/18/2007WO2007116517A1 Compound semiconductor structure and process for producing the same
10/18/2007WO2007116515A1 Semiconductor device, process for producing the same, method of dry etching, and process for fabricating wiring material
10/18/2007WO2007116512A1 Method for manufacturing semiconductor device
10/18/2007WO2007116503A1 Integrated circuit device, manufacturing device, and manufacturing method
10/18/2007WO2007116501A1 Semiconductor device and its manufacturing method
10/18/2007WO2007116492A1 Method for manufacturing semiconductor device
10/18/2007WO2007116471A1 Capacitative element
10/18/2007WO2007116470A1 Semiconductor device and process for producing the same
10/18/2007WO2007116469A1 Method of transferring pattern and apparatus for transferring pattern
10/18/2007WO2007116463A1 Semiconductor device
10/18/2007WO2007116445A1 Semiconductor device, and its manufacturing method
10/18/2007WO2007116443A1 Semiconductor device and process for producing the same
10/18/2007WO2007116442A1 Semiconductor device and method for fabricating the same
10/18/2007WO2007116440A1 Method for manufacturing semiconductor device
10/18/2007WO2007116436A1 Semiconductor device and method for manufacturing the same
10/18/2007WO2007116433A1 Semiconductor device having ferroelectric element
10/18/2007WO2007116420A1 Process for manufacturing a semiconductor power device and respective device
10/18/2007WO2007116362A1 Method of manufacturing a semiconductor device
10/18/2007WO2007116238A1 METHOD OF MANUFACTURING A GaN MOSFET
10/18/2007WO2007116033A1 Etching process
10/18/2007WO2007115954A1 Co-integration of multi-gate fet with other fet devices in cmos technology
10/18/2007WO2007115849A1 Method for treatment of material having nanoscale pores
10/18/2007WO2007115585A1 Method of forming a semiconductor device and semiconductor device
10/18/2007WO2007115509A1 A magnetic logic element with toroidal multiple magnetic films and a method of logic treatment using the same
10/18/2007WO2007115371A1 Method, apparatus and resulting structures in the manufacture of semiconductors
10/18/2007WO2007098230A3 Shallow trench isolation structure
10/18/2007WO2007091196A3 A semiconductor process system having an optical instrument comprising an apparatus for aligning an optical device with an object
10/18/2007WO2007081880A3 Method and apparatus for providing an integrated circuit having p and n doped gates
10/18/2007WO2007072405A3 Semiconductor device with recessed field plate and method of manufacturing the same
10/18/2007WO2007072305A3 Source and drain formation in silicon on insulator device
10/18/2007WO2007072304A3 Integrated high voltage diode and manufacturing method therefof
10/18/2007WO2007069151A3 Field effect transistor structure with an insulating layer at the junction
10/18/2007WO2007038399A3 Metal cations for initiating chemical mechanical polishing
10/18/2007WO2006101768A3 Method for fabricating a wafer level package having through wafer vias for external package connectivity and related structure
10/18/2007WO2006063102A3 Method of correction for wafer crystal cut error in semiconductor processing
10/18/2007WO2002003422A3 Integrated circuits packaging system and method
10/18/2007US20070245292 Lithography simulation method, photomask manufacturing method, semiconductor device manufacturing method, and recording medium
10/18/2007US20070245276 System, method and computer program product for designing connecting terminals of semiconductor device
10/18/2007US20070244593 Test circuit, semiconductor product wafer having the test circuit, and method of monitoring manufacturing process using the test circuit
10/18/2007US20070243797 Polishing method and polishing apparatus
10/18/2007US20070243796 Method and apparatus for polishing a wafer with a higher in-plane uniformity
10/18/2007US20070243722 Silicon carbide semiconductor device and manufacturing method thereof
10/18/2007US20070243721 Absorber layer for dsa processing
10/18/2007US20070243720 UV treatment for low-k dielectric layer in damascene structure
10/18/2007US20070243719 Shadow mask deposition of materials using reconfigurable shadow masks
10/18/2007US20070243718 Dye sensitive metal oxide semiconductor electrode, method for manufacturing the same, and dye sensitized solar cell
10/18/2007US20070243717 Carbon nanotube apparatus and method of carbon nanotube modification
10/18/2007US20070243716 Selection and deposition of nanoparticles using CO2-expanded liquids
10/18/2007US20070243715 Cleaning solution and method for selectively removing layer in a silicidation process
10/18/2007US20070243714 Method of controlling silicon-containing polymer build up during etching by using a periodic cleaning step
10/18/2007US20070243713 Apparatus and method for generating activated hydrogen for plasma stripping
10/18/2007US20070243712 Mask profile control for controlling feature profile
10/18/2007US20070243711 Substrate Treatment Method and Substrate Treatment Apparatus
10/18/2007US20070243710 Adjuvant for CMP slurry
10/18/2007US20070243709 Planarization of substrates at a high polishing rate using electrochemical mechanical polishing
10/18/2007US20070243708 Manufacturing method for an integrated semiconductor contact structure having an improved aluminum fill
10/18/2007US20070243707 Hard Mask Layer Stack And A Method Of Patterning
10/18/2007US20070243706 Method of manufacturing a through electrode
10/18/2007US20070243705 Methods and apparatus for sensor having capacitor on chip
10/18/2007US20070243704 Substrate structure having a solder mask and a process for making the same
10/18/2007US20070243703 Processes and structures for epitaxial growth on laminate substrates
10/18/2007US20070243702 Dual-side epitaxy processes for production of nitride semiconductor structures
10/18/2007US20070243701 Semiconductor device fabrication method using ultra-rapid thermal annealing
10/18/2007US20070243700 Method of photoresist strip for plasma doping process of semiconductor manufacturing
10/18/2007US20070243699 Method of manufacturing silicon epitaxial wafer
10/18/2007US20070243698 Polysilicon film having smooth surface and method of forming the same
10/18/2007US20070243697 Lithographic apparatus and device manufacturing method
10/18/2007US20070243696 Laser beam processing machine
10/18/2007US20070243695 Method for Producing Semiconductor Wafers and a System for Determining a Cut Position in a Semiconductor Ingot
10/18/2007US20070243694 Bonded wafer and method of producing the same
10/18/2007US20070243693 Integrated process modulation (ipm) a novel solution for gapfill with hdp-cvd
10/18/2007US20070243692 Methods of filling isolation trenches for semiconductor devices and resulting structures
10/18/2007US20070243691 Manufacturing method of semiconductor device
10/18/2007US20070243690 Methods for fabricating a capacitor
10/18/2007US20070243689 Semiconductor device having semiconductor and base contact pad mesa portions
10/18/2007US20070243688 Method for forming strained semiconductor device and method for forming source/drain region
10/18/2007US20070243687 Method of manufacturing semiconductor device capable of suppressing impurity concentration reduction in doped channel region arising from formation of gate insulting film
10/18/2007US20070243686 Method of forming compressive nitride film and method of manufacturing metal oxide semiconductor
10/18/2007US20070243685 Method and structure for self aligned formation of a gate polysilicon layer
10/18/2007US20070243684 Semiconductor device and method of manufaturing the same
10/18/2007US20070243683 A method for forming multi gate devices using a silicon oxide masking layer
10/18/2007US20070243682 Flash memory device having a graded composition, high dielectric constant gate insulator
10/18/2007US20070243681 Method of fabricating flash memory device using sidewall process
10/18/2007US20070243680 Methods of Making Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element
10/18/2007US20070243679 Process for manufacturing a non-volatile memory structure via soft lithography
10/18/2007US20070243678 Inkjet printing of cross point passive matrix devices
10/18/2007US20070243677 Semiconductor device having a schottky source/drain transistor
10/18/2007US20070243676 Image sensor device and manufacturing method thereof
10/18/2007US20070243675 Use of silicon block process step to camouflage a false transistor
10/18/2007US20070243674 Polytype hetero-interface high electron mobility device and method of making
10/18/2007US20070243673 Thin-film transistor array for lcd and the method for manufacturing the same
10/18/2007US20070243672 Semiconductor device and method for fabricating the same
10/18/2007US20070243671 Butted source contact and well strap
10/18/2007US20070243670 Thin Film Transistor (TFT) and Method for Fabricating the Same
10/18/2007US20070243669 Method for manufacturing solid-state image pickup element and solid-state image pickup element
10/18/2007US20070243668 Normally-off integrated JFET power switches in wide bandgap semiconductors and methods of making
10/18/2007US20070243667 POP Semiconductor Device Manufacturing Method
10/18/2007US20070243666 Semiconductor package, array arranged substrate structure for the semiconductor package and fabrication method of the semiconductor package
10/18/2007US20070243665 Palladium-Spot Leadframes for High Adhesion Semiconductor Devices and Method of Fabrication
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