Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2007
10/30/2007US7289194 Positioning apparatus, exposure apparatus, and device manufacturing method
10/30/2007US7289192 Projection exposure device
10/30/2007US7289190 Monitoring apparatus and method particularly useful in photolithographically
10/30/2007US7289150 Solid-state image apparatus including a plurality of horizontal transfer registers for transferring image signals from an imaging area
10/30/2007US7288954 Compliant contact pin test assembly and methods thereof
10/30/2007US7288953 Method for testing using a universal wafer carrier for wafer level die burn-in
10/30/2007US7288950 Contacting component, method of producing the same, and test tool having the contacting component
10/30/2007US7288948 Patterned wafer inspection method and apparatus therefor
10/30/2007US7288848 Overlay mark for measuring and correcting alignment errors
10/30/2007US7288846 Semiconductor chip having pads with plural junctions for different assembly methods
10/30/2007US7288845 Fabrication of wire bond pads over underlying active devices, passive devices and/or dielectric layers in integrated circuits
10/30/2007US7288844 Semiconductor device, semiconductor circuit and method for producing semiconductor device
10/30/2007US7288843 Integrated circuit chip support substrate for placing in a mold, and associated method
10/30/2007US7288839 Apparatus and methods for cooling semiconductor integrated circuit package structures
10/30/2007US7288837 Semiconductor device and its writing method
10/30/2007US7288835 Integrated circuit package-in-package system
10/30/2007US7288834 Semiconductor device, carrier, card reader, methods of initializing and checking authenticity
10/30/2007US7288832 Chip-mounted film package
10/30/2007US7288830 III-V nitride semiconductor substrate and its production method
10/30/2007US7288827 Self-aligned mask formed utilizing differential oxidation rates of materials
10/30/2007US7288826 Semiconductor integrated circuit device
10/30/2007US7288825 Low-noise semiconductor photodetectors
10/30/2007US7288824 Microelectromechanical systems, and devices having thin film encapsulated mechanical structures
10/30/2007US7288823 Double gate field effect transistor and method of manufacturing the same
10/30/2007US7288820 Low voltage NMOS-based electrostatic discharge clamp
10/30/2007US7288819 Stable PD-SOI devices and methods
10/30/2007US7288817 Reverse metal process for creating a metal silicide transistor gate structure
10/30/2007US7288815 Semiconductor device and manufacturing method thereof
10/30/2007US7288814 Selective post-doping of gate structures by means of selective oxide growth
10/30/2007US7288812 Semiconductor memory with virtual ground architecture
10/30/2007US7288811 Direct tunneling memory with separated transistor and tunnel areas
10/30/2007US7288810 Nonvolatile semiconductor memory device having double floating gate structure and method of manufacturing the same
10/30/2007US7288808 Capacitor constructions with enhanced surface area
10/30/2007US7288806 DRAM arrays
10/30/2007US7288799 Semiconductor device and fabrication method thereof
10/30/2007US7288797 Semiconductor light emitting element
10/30/2007US7288792 Method of manufacturing semiconductor device, method of manufacturing electronic apparatus, semiconductor device, and electronic apparatus
10/30/2007US7288791 Epitaxial wafer and method for manufacturing method
10/30/2007US7288790 Thin film transistor array panel and manufacturing method thereof
10/30/2007US7288789 Semiconductor device having thin film transistor and light-shielding film
10/30/2007US7288786 Integrated circuit configuration with analysis protection and method for producing the configuration
10/30/2007US7288783 Optical semiconductor device and method for fabricating the same
10/30/2007US7288781 Programmable structure, an array including the structure, and methods of forming the same
10/30/2007US7288779 Method for position determination, method for overlay optimization, and lithographic projection apparatus
10/30/2007US7288757 Microelectronic imaging devices and associated methods for attaching transmissive elements
10/30/2007US7288729 Circuit board and method for manufacturing the same and semiconductor device and method for manufacturing the same
10/30/2007US7288492 Method for forming interconnects on thin wafers
10/30/2007US7288491 Plasma immersion ion implantation process
10/30/2007US7288490 Increased alignment in carbon nanotube growth
10/30/2007US7288489 Process for thinning a semiconductor workpiece
10/30/2007US7288488 Method for resist strip in presence of regular low k and/or porous low k dielectric materials
10/30/2007US7288487 Metal/oxide etch after polish to prevent bridging between adjacent features of a semiconductor structure
10/30/2007US7288486 Method for manufacturing semiconductor device having via holes
10/30/2007US7288485 Device and method for anisotropic plasma etching of a substrate, particularly a silicon element
10/30/2007US7288484 Photoresist strip method for low-k dielectrics
10/30/2007US7288483 Method and system for patterning a dielectric film
10/30/2007US7288482 Silicon nitride etching methods
10/30/2007US7288481 Semiconductor device having through electrode and method of manufacturing the same
10/30/2007US7288480 Thin film integrated circuit and method for manufacturing the same, CPU, memory, electronic card and electronic device
10/30/2007US7288479 Method for forming a barrier/seed layer for copper metallization
10/30/2007US7288478 Method for performing chemical shrink process over BARC (bottom anti-reflective coating)
10/30/2007US7288477 Electro-luminescence device including a thin film transistor and method of fabricating an electro-luminescence device
10/30/2007US7288476 Controlled dry etch of a film
10/30/2007US7288475 Sacrificial inorganic polymer intermetal dielectric damascene wire and via liner
10/30/2007US7288474 Suspension for filling via holes in silicon and method for making the same
10/30/2007US7288473 Metal layer in semiconductor device and method of forming the same
10/30/2007US7288472 Method and system for performing die attach using a flame
10/30/2007US7288471 Bumping electronic components using transfer substrates
10/30/2007US7288470 Semiconductor device comprising buried channel region and method for manufacturing the same
10/30/2007US7288469 Methods and apparatuses for forming an article
10/30/2007US7288468 Luminescent efficiency of semiconductor nanocrystals by surface treatment
10/30/2007US7288467 Wafer processing method
10/30/2007US7288466 Processing method, manufacturing method of semiconductor device, and processing apparatus
10/30/2007US7288465 Semiconductor wafer front side protection
10/30/2007US7288464 MEMS packaging structure and methods
10/30/2007US7288463 Pulsed deposition layer gap fill with expansion material
10/30/2007US7288462 Buffer zone for the prevention of metal migration
10/30/2007US7288461 Method of forming interconnect having stacked alignment mark
10/30/2007US7288460 Capacitor having an anodic metal oxide substrate
10/30/2007US7288459 Organic substrates with integral thin-film capacitors, methods of making same, and systems containing same
10/30/2007US7288458 SOI active layer with different surface orientation
10/30/2007US7288457 Method for making semiconductor device comprising a superlattice with upper portions extending above adjacent upper portions of source and drain regions
10/30/2007US7288456 Semiconductor device and method for fabricating the same
10/30/2007US7288455 Method of forming non-volatile memory cell array having discontinuous source and drain diffusions contacted by continuous bit line conductors
10/30/2007US7288454 Methods of forming capacitors for semiconductor memory devices and resulting semiconductor memory devices
10/30/2007US7288453 Method of fabricating analog capacitor using post-treatment technique
10/30/2007US7288452 Method for manufacturing semiconductor device
10/30/2007US7288451 Method and structure for forming self-aligned, dual stress liner for CMOS devices
10/30/2007US7288450 General protection of an integrated circuit against permant overloads and electrostatic discharges
10/30/2007US7288449 Method of manufacturing an ESD protection device with the same mask for both LDD and ESD implantation
10/30/2007US7288448 Method and apparatus for mobility enhancement in a semiconductor device
10/30/2007US7288447 Semiconductor device having trench isolation for differential stress and method therefor
10/30/2007US7288446 Single and double-gate pseudo-FET devices for semiconductor materials evaluation
10/30/2007US7288445 Double gated transistor and method of fabrication
10/30/2007US7288444 Thin film transistor and method of manufacturing the same
10/30/2007US7288443 Structures and methods for manufacturing p-type MOSFET with graded embedded silicon-germanium source-drain and/or extension
10/30/2007US7288442 Method for manufacturing contact structures of wirings
10/30/2007US7288441 Method for two-stage transfer molding device to encapsulate MMC module
10/30/2007US7288440 Method of manufacturing a semiconductor device
10/30/2007US7288439 Leadless microelectronic package and a method to maximize the die size in the package
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