Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2007
11/15/2007US20070264837 Thin transition layer between a group iii-v substrate and a high-k gate dielectric layer
11/15/2007US20070264836 Method for forming a gate and etching a conductive layer
11/15/2007US20070264835 Photodiode Array, Method For Manufacturing The Same, And The Optical Measurement System Thereof
11/15/2007US20070264834 Method for Synthesis of Colloidal Nanoparticles
11/15/2007US20070264833 High resolution patterning of surface energy utilizing high resolution monomolecular resist for fabrication of patterned media masters
11/15/2007US20070264832 Manufacturing Method For Semiconductor Chips
11/15/2007US20070264831 Use of ion implantation in chemical etching
11/15/2007US20070264830 Pitch reduction
11/15/2007US20070264829 Slurry and method for chemical mechanical polishing
11/15/2007US20070264828 Method for forming fine pattern of semiconductor device
11/15/2007US20070264827 Method for achieving uniform chemical mechanical polishing in integrated circuit manufacturing
11/15/2007US20070264826 Methods of making self-aligned nano-structures
11/15/2007US20070264825 Etching Method and Manufacturing Method of Semiconductor Device
11/15/2007US20070264824 Methods to eliminate contact plug sidewall slit
11/15/2007US20070264823 Semiconductor device with sti structure and method of fabricating the same
11/15/2007US20070264822 Peripheral processing method and method of manufacturing a semiconductor device
11/15/2007US20070264821 Methods of forming a semiconductor device
11/15/2007US20070264820 Protruded contact and insertion of inter-layer-dielectric material to match damascene hardmask to improve undercut for low-k interconnects
11/15/2007US20070264819 Method of forming an electrical isolation associated with a wiring level on a semiconductor wafer
11/15/2007US20070264818 Method for manufacturing semiconductor device including a landing pad
11/15/2007US20070264817 Via Line Barrier and Etch Stop Structure
11/15/2007US20070264816 Copper alloy layer for integrated circuit interconnects
11/15/2007US20070264815 Method for fabricating semiconductor device
11/15/2007US20070264814 Method for forming metal wiring line, method for manufacturing active matrix substrate, device, electro-optical device, and electronic apparatus
11/15/2007US20070264813 Process for producing a film carrier tape for mounting an electronic part
11/15/2007US20070264812 High density chalcogenide memory cells
11/15/2007US20070264811 Method for forming salicide in semiconductor device
11/15/2007US20070264810 Semiconductor devices and methods of forming the same
11/15/2007US20070264809 Process for manufacture of trench schottky
11/15/2007US20070264808 Plasma doping method and method for fabricating semiconductor device using the same
11/15/2007US20070264807 Cleaining Process and Operating Process for a Cvd Reactor
11/15/2007US20070264806 Mask for sequential lateral solidification and method of performing sequential lateral solidification using the same
11/15/2007US20070264805 Integrated light emitting device and photodiode with ohmic contact
11/15/2007US20070264804 Method and system for reducing charge damage in silicon-on-insulator technology
11/15/2007US20070264803 Semiconductor substrate, and semiconductor device and method of manufacturing the semiconductor device
11/15/2007US20070264802 Method for manufacturing nitride semiconductor laser element, and nitride semiconductor laser element
11/15/2007US20070264801 Semiconductor buffer structures
11/15/2007US20070264800 Method of degassing thin layer and method of manufacturing silicon thin film
11/15/2007US20070264799 Wafer laser processing method
11/15/2007US20070264798 Method and System for Partially Removing Circuit Patterns From a Multi-Project Wafer
11/15/2007US20070264797 Method for producing semiconductor substrate
11/15/2007US20070264796 Method for forming a semiconductor on insulator structure
11/15/2007US20070264795 Method and materials to control doping profile in integrated circuit substrate material
11/15/2007US20070264794 Methods of forming trench isolation and methods of forming arrays of FLASH memory cells
11/15/2007US20070264793 Methods of Manufacturing Semiconductor Memory Devices with Unit Cells Having Charge Trapping Layers
11/15/2007US20070264792 Method for producing deep trench structures
11/15/2007US20070264791 Method of gap-filling using amplitude modulation radiofrequency power and apparatus for the same
11/15/2007US20070264790 Method of manufacturing semiconductor device
11/15/2007US20070264789 Semiconductor device having a device isolation trench
11/15/2007US20070264788 Method to define a transistor gate of a DRAM and the transistor gate using same
11/15/2007US20070264787 METHOD TO BUILD SELF-ALIGNED NPN IN ADVANCED BiCMOS TECHNOLOGY
11/15/2007US20070264786 Method of manufacturing metal oxide semiconductor transistor
11/15/2007US20070264785 Method of Forming High Breakdown Voltage Low On-Resistance Lateral DMOS Transistor
11/15/2007US20070264784 Reduction of field edge thinning in peripheral devices
11/15/2007US20070264783 High performance stress-enhanced mosfets using si:c and sige epitaxial source/drain and method of manufacture
11/15/2007US20070264782 Method of Making a MOS-Gated Transistor with Reduced Miller Capacitance
11/15/2007US20070264781 Method for the production of a semiconductor component having a metallic gate electrode disposed in a double-recess structure
11/15/2007US20070264780 Method of fabricating a vertical nano-transistor
11/15/2007US20070264779 Methods for forming floating gate memory structures
11/15/2007US20070264778 Memory device with quantum dot and method for manufacturing the same
11/15/2007US20070264777 Method for forming a floating gate using chemical mechanical planarization
11/15/2007US20070264776 Precision creation of inter-gates insulator
11/15/2007US20070264775 Non-volatile memory device and method of manufacturing the same
11/15/2007US20070264774 Method of Manufacturing a Flash Memory Device
11/15/2007US20070264773 Methods of etching stacks having metal layers and hard mask layers
11/15/2007US20070264772 Method for fabricating recessed gate mos transistor device
11/15/2007US20070264771 Dual work function recessed access device and methods of forming
11/15/2007US20070264770 Capacitor forming method
11/15/2007US20070264769 Semiconductor device and method of manufacturing the same
11/15/2007US20070264768 Method for designing and manufacturing a PMOS device with drain junction breakdown point located for reduced drain breakdown voltage walk-in
11/15/2007US20070264767 Enhanced PMOS via transverse stress
11/15/2007US20070264766 Nos non-volatile memory cell and method of operating the same
11/15/2007US20070264765 Method of manufacturing metal oxide semiconductor and complementary metal oxide semiconductor
11/15/2007US20070264764 Formation of carbon and semiconductor nanomaterials using molecular assemblies
11/15/2007US20070264763 Method for the production of a semiconductor component having a metallic gate electrode disposed in a double-recess structure
11/15/2007US20070264762 Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors
11/15/2007US20070264761 Method of forming a gate insulator and thin film transistor incorporating the same
11/15/2007US20070264760 Method of forming a memory cell array
11/15/2007US20070264759 Manufacturing semiconductor device and method of manufacturing electronic apparatus
11/15/2007US20070264758 Systems and arrangements to interconnect components of a semiconductor device
11/15/2007US20070264757 Micro-package, multi-stack micro-package, and manufacturing method therefor
11/15/2007US20070264756 Method and apparatus for manufacture and inspection of semiconductor device
11/15/2007US20070264755 Method of manufacturing printed circuit board for fine circuit formation
11/15/2007US20070264754 Method of fabricating a semiconductor device incorporating a semiconductor constructing body and an interconnecting layer which is connected to a ground layer via a vertical conducting portion
11/15/2007US20070264753 Semiconductor package and method for manufacturing the same
11/15/2007US20070264752 Method of manufacturing a semiconductor device
11/15/2007US20070264751 Super High Density Module with Integrated Wafer Level Packages
11/15/2007US20070264750 Method of Manufacturing the Substrate for Packaging Integrated Circuits
11/15/2007US20070264749 Multi-Post Structures
11/15/2007US20070264744 Optical bench, slim optical pickup employing the same and method of manufacturing the optical bench
11/15/2007US20070264743 Semiconductor input control device
11/15/2007US20070264742 Glass substrate and capacitance-type pressure sensor using the same
11/15/2007US20070264741 Methods for making fixed parallel plate MEMS capacitor microsensors and microsensor arrays
11/15/2007US20070264739 Light emitting device using a thermally activated coating and method of manufacturing
11/15/2007US20070264738 Monolithic semiconductor laser and method of manufacturing the same
11/15/2007US20070264737 Dual layer color-center patterned light source
11/15/2007US20070264736 Array substrates for use in liquid crystal displays and fabrication methods thereof
11/15/2007US20070264735 Array substrate and display panel
11/15/2007US20070264733 Method of manufacturing vertical gallium nitride-based light emitting diode
11/15/2007US20070264732 Three-Dimensional, Ultrasonic Transducer Arrays, Methods of Making Ultrasonic Transducer Arrays, and Devices Including Ultrasonic Transducer Arrays
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