Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2008
02/21/2008WO2008005540A3 Method and apparatus for cleaning a wafer substrate
02/21/2008WO2008005378A3 Gate dielectric materials for group iii-v enhancement mode transistors
02/21/2008WO2008005377A3 Selective spacer formation on transistors of different classes on the same device
02/21/2008WO2008003021A3 Shielded via
02/21/2008WO2007150012A3 Apparatus and method for semiconductor bonding
02/21/2008WO2007149737A3 Bulk metallic glass solders, foamed bulk metallic glass solders, foamed- solder bond pads in chip packages, methods of assembling same and systems containing same
02/21/2008WO2007149515A3 Floating gate memory devices and fabrication
02/21/2008WO2007145873A3 Growth of low dislocation density group-iii nitrides and related thin-film structures
02/21/2008WO2007144053A3 Semiconductor device with a trench isolation and method of manufacturing trenches in a semiconductor body
02/21/2008WO2007143028A3 Low dielectric constant materials prepared from soluble fullerene clusters
02/21/2008WO2007123645A3 Dispensable cured resin
02/21/2008WO2007119321A3 Light-emitting device using oxide semiconductor thin-film transistor and image display apparatus using the same
02/21/2008WO2007100927A3 Method of packaging a semiconductor die and package thereof
02/21/2008WO2007084879A3 Low resistance and inductance backside through vias and methods of fabricating same
02/21/2008WO2007053686A3 Monolithically integrated semiconductor materials and devices
02/21/2008WO2007008251A3 Hard mask structure for patterning of materials
02/21/2008WO2006047410A3 Fluid storage and dispensing system including dynamic fluid monitoring of fluid storage and dispensing vessel
02/21/2008WO2006039193A3 Rf ground switch for plasma processing system
02/21/2008US20080046759 ID installable LSI, secret key installation method, LSI test method, and LSI development method
02/21/2008US20080046198 Overhead traveling vehicle testing and calibration
02/21/2008US20080046183 Method for determining a map, device manufacturing method, and lithographic apparatus
02/21/2008US20080046111 Heat processing apparatus, heat processing method, computer program and storage medium
02/21/2008US20080046110 Temperature Regulating Method, Thermal Processing System and Semiconductor Device Manufacturing Method
02/21/2008US20080046080 Method for forming packaged microelectronic devices and devices thus obtained
02/21/2008US20080045125 Polishing Pad and Chemical Mechanical Polishing Apparatus
02/21/2008US20080045042 Method for crystalizing amorphous silicon layer and mask therefor
02/21/2008US20080045041 Liquid Immersion Laser Spike Anneal
02/21/2008US20080045040 Laser Spike Anneal With Plural Light Sources
02/21/2008US20080045039 Method of forming nitride films with high compressive stress for improved pfet device performance
02/21/2008US20080045038 Method of forming an insulative film
02/21/2008US20080045037 Method for Producing Layers Located on a Hybrid Circuit
02/21/2008US20080045036 Via hole forming method
02/21/2008US20080045035 Etching solution for etching metal layer, etching method using the etching solution, and method of fabricating semiconductor product using the etching solution
02/21/2008US20080045034 Methods for forming semiconductor constructions, and methods for selectively etching silicon nitride relative to conductive material
02/21/2008US20080045033 Stacked structure and patterning method using the same
02/21/2008US20080045032 Method for producing semiconductor device
02/21/2008US20080045031 Plasma etching method and computer readable storage medium
02/21/2008US20080045030 Substrate processing method, substrate processing system and storage medium
02/21/2008US20080045029 Semiconductor substrate processing apparatus
02/21/2008US20080045028 Wafer probe
02/21/2008US20080045027 Method for fabricating semiconductor intergrated circuit device
02/21/2008US20080045026 Method for manufacturing semiconductor device
02/21/2008US20080045025 Semiconductor device manufacturing method
02/21/2008US20080045024 Method for manufacturing semiconductor device
02/21/2008US20080045023 Method for manufacturing semiconductor device, and semiconductor device
02/21/2008US20080045022 Semiconductor Device Manufacturing Method
02/21/2008US20080045021 Dual reduced agents for barrier removal in chemical mechanical polishing
02/21/2008US20080045020 Slurry Composition For a Chemical Mechanical Polishing Process, Method of Polishing an Object Layer and Method of Manufacturing a Semiconductor Memory Device Using the Slurry Composition
02/21/2008US20080045019 Method of Fabricating Semiconductor Device
02/21/2008US20080045018 Method of chemical-mechanical polishing and method of forming isolation layer using the same
02/21/2008US20080045017 Semiconductor Wafer Handler
02/21/2008US20080045016 Cleaning composition, cleaning method, and manufacturing method of semiconductor device
02/21/2008US20080045015 Method of etching wafer
02/21/2008US20080045014 Complex chemical mechanical polishing and method for manufacturing shallow trench isolation structure
02/21/2008US20080045013 Iridium encased metal interconnects for integrated circuit applications
02/21/2008US20080045012 Electroprocessing profile control
02/21/2008US20080045011 Trilayer resist scheme for gate etching applications
02/21/2008US20080045010 Reducing silicon attack and improving resistivity of tungsten nitride film
02/21/2008US20080045009 Method and apparatus for simultaneously removing multiple conductive materials from microelectronic substrates
02/21/2008US20080045008 Post passivation interconnection schemes on top of IC chip
02/21/2008US20080045007 Top Layers of Metal for Integrated Circuits
02/21/2008US20080045006 Semiconductor device
02/21/2008US20080045005 Pattern formation method and method for forming semiconductor device
02/21/2008US20080045004 Post passivation interconnection schemes on top of IC chips
02/21/2008US20080045003 Method of wire bonding over active area of a semiconductor circuit
02/21/2008US20080045002 Post passivation interconnection schemes on top of IC chip
02/21/2008US20080045001 Post passivation interconnection schemes on top of IC chip
02/21/2008US20080045000 Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium
02/21/2008US20080044999 Method for an improved air gap interconnect structure
02/21/2008US20080044998 Method of Fabricating Metal Interconnection of Semiconductor Device
02/21/2008US20080044997 Semiconductor device and method for manufacturing same
02/21/2008US20080044996 Contact structure of semiconductor device, manufacturing method thereof, thin film transistor array panel including contact structure, and manufacturing method thereof
02/21/2008US20080044995 Trilayer resist organic layer etch
02/21/2008US20080044994 Semiconductor device capable of threshold voltage adjustment by applying an external voltage
02/21/2008US20080044993 Semiconductor device and method of manufacturing the same
02/21/2008US20080044992 Method for fabricating a recess gate in a semiconductor device
02/21/2008US20080044991 Semiconductor device and method of fabricating the same
02/21/2008US20080044990 Method for Fabricating A Semiconductor Device Comprising Surface Cleaning
02/21/2008US20080044989 Photomask and its method of manufacture
02/21/2008US20080044988 Method for producing an integrated circuit having semiconductor zones with a steep doping profile
02/21/2008US20080044987 ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN <110> Si UNDER BIAXIAL COMPRESSIVE STRAIN
02/21/2008US20080044986 Method for improved dielectric performance
02/21/2008US20080044985 Methods for releasably attaching sacrificial support members to microfeature workpieces and microfeature devices formed using such methods
02/21/2008US20080044984 Methods of avoiding wafer breakage during manufacture of backside illuminated image sensors
02/21/2008US20080044983 Element formation substrate, method of manufacturing the same, and semiconductor device
02/21/2008US20080044982 Thin film transistor array panel for a display device and a method of manufacturing the same
02/21/2008US20080044981 Trench Isolation Methods, Methods of Forming Gate Structures Using the Trench Isolation Methods and Methods of Fabricating Non-Volatile Memory Devices Using the Trench Isolation Methods
02/21/2008US20080044980 Method of forming a semiconductor device
02/21/2008US20080044979 Integrated circuitry, electromagnetic radiation interaction components, transistor devices and semiconductor construction; and methods of forming integrated circuitry, electromagnetic radiation interaction components, transistor devices and semiconductor constructions
02/21/2008US20080044978 Isolation structures for integrated circuits and modular methods of forming the same
02/21/2008US20080044977 High performance system-on-chip using post passivation process
02/21/2008US20080044976 High performance system-on-chip using post passivation process
02/21/2008US20080044975 Thin-film transistor, method for manufacturing thin-film transistor, and display using thin-film transistors
02/21/2008US20080044974 Embedded stressed nitride liners for cmos performance improvement
02/21/2008US20080044973 Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology
02/21/2008US20080044972 Methods of Forming Nonvolatile Memories with Shaped Floating Gates
02/21/2008US20080044971 Method for fabricating a semiconductor device having a capacitor
02/21/2008US20080044970 Memory structure and method for preparing the same
02/21/2008US20080044969 Turn-on-efficient bipolar structures with deep n-well for on-chip esd protection
02/21/2008US20080044968 Method for improving transistor performance through reducing the salicide interface resistance