Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2008
11/04/2008US7446362 Semiconductor memory device and method of manufacturing the same
11/04/2008US7446361 Capacitor and semiconductor device having a ferroelectric material
11/04/2008US7446350 Embedded silicon germanium using a double buried oxide silicon-on-insulator wafer
11/04/2008US7446346 Semiconductor substrate for optoelectronic components and method for fabricating it
11/04/2008US7446340 Method of manufacturing thin film transistor
11/04/2008US7446339 Display device having a curved surface
11/04/2008US7446337 Thin film transistor substrate using a horizontal electric field
11/04/2008US7446336 Electronics device, semiconductor device, and method for manufacturing the same
11/04/2008US7446334 Electronic device comprising active optical devices with an energy band engineered superlattice
11/04/2008US7446324 Methods utilizing scanning probe microscope tips and products thereof or produced thereby
11/04/2008US7446289 Enhanced plasma filter
11/04/2008US7446262 Laminated electronic component and method for producing the same
11/04/2008US7446217 Composition and method for low temperature deposition of silicon-containing films
11/04/2008US7446063 Silicon nitride films
11/04/2008US7446062 Device having dual etch stop liner and reformed silicide layer and related methods
11/04/2008US7446061 Method of forming insulating film, method of manufacturing semiconductor device and their controlling computer program
11/04/2008US7446060 Thin-film forming method using silane and an oxidizing gas
11/04/2008US7446059 Semiconductor device and method for manufacturing same
11/04/2008US7446058 Adhesion enhancement for metal/dielectric interface
11/04/2008US7446057 Fabrication method
11/04/2008US7446056 Method for increasing polysilicon grain size
11/04/2008US7446055 Aerosol misted deposition of low dielectric organosilicate films
11/04/2008US7446054 Method for manufacturing semiconductor device
11/04/2008US7446053 Forming a nano-composite layer over the lower electrode, the nano-composite layer including different sub-layers, densifying the nano-composite layer; forming an upper electrode layer over the nano-composite layer
11/04/2008US7446052 Method for forming insulation film
11/04/2008US7446051 Method of etching silicon
11/04/2008US7446050 Etching and plasma treatment process to improve a gate profile
11/04/2008US7446049 Method for fabricating semiconductor device using amorphous carbon layer as sacrificial hard mask
11/04/2008US7446048 Dry etching apparatus and dry etching method
11/04/2008US7446047 Metal structure with sidewall passivation and method
11/04/2008US7446046 Selective polish for fabricating electronic devices
11/04/2008US7446045 Method of manufacturing nitride substrate for semiconductors
11/04/2008US7446044 Carbon nanotube switches for memory, RF communications and sensing applications, and methods of making the same
11/04/2008US7446043 Contact structure having silicide layers, semiconductor device employing the same, and methods of fabricating the contact structure and semiconductor device
11/04/2008US7446042 Method for silicide formation on semiconductor devices
11/04/2008US7446041 Full sequence metal and barrier layer electrochemical mechanical processing
11/04/2008US7446040 Structure for optimizing fill in semiconductor features deposited by electroplating
11/04/2008US7446039 Integrated circuit system with dummy region
11/04/2008US7446038 Interlayer interconnect of three-dimensional memory and method for manufacturing the same
11/04/2008US7446037 Cladded silver and silver alloy metallization for improved adhesion and electromigration resistance
11/04/2008US7446036 Gap free anchored conductor and dielectric structure and method for fabrication thereof
11/04/2008US7446035 Post passivation interconnection schemes on top of IC chips
11/04/2008US7446034 Process for making a metal seed layer
11/04/2008US7446033 Method of forming a metal interconnection of a semiconductor device, and metal interconnection formed by such method
11/04/2008US7446032 Methods of providing an adhesion layer for adhesion of barrier and/or seed layers to dielectric films
11/04/2008US7446031 Post passivation interconnection schemes on top of IC chips
11/04/2008US7446030 Methods for fabricating current-carrying structures using voltage switchable dielectric materials
11/04/2008US7446029 Semiconductor element and manufacturing method thereof
11/04/2008US7446028 Multi-component integrated circuit contacts
11/04/2008US7446027 Method for forming gate structure with local pulled-back conductive layer and its use
11/04/2008US7446026 Method of forming a CMOS device with stressor source/drain regions
11/04/2008US7446025 Method of forming vertical FET with nanowire channels and a silicided bottom contact
11/04/2008US7446024 Method of forming nanowires with a narrow diameter distribution
11/04/2008US7446023 High-density plasma hydrogenation
11/04/2008US7446022 Wafer laser processing method
11/04/2008US7446020 Wafer dividing method and dividing apparatus
11/04/2008US7446019 Method of reducing roughness of a thick insulating layer
11/04/2008US7446018 Bonded-wafer superjunction semiconductor device
11/04/2008US7446017 Methods and apparatus for RF shielding in vertically-integrated semiconductor devices
11/04/2008US7446016 Method for producing bonded wafer
11/04/2008US7446015 Semiconductor device and method for manufacturing the same
11/04/2008US7446014 Nanoelectrochemical cell
11/04/2008US7446013 Method of measuring pattern shift in semiconductor device
11/04/2008US7446012 Lateral PNP transistor and the method of manufacturing the same
11/04/2008US7446011 Array of cells including a selection bipolar transistor and fabrication method thereof
11/04/2008US7446010 Metal/semiconductor/metal (MSM) back-to-back Schottky diode
11/04/2008US7446009 Manufacturing method for semiconductor device
11/04/2008US7446008 Method for fabricating silicide layers for semiconductor device
11/04/2008US7446007 Multi-layer spacer with inhibited recess/undercut and method for fabrication thereof
11/04/2008US7446006 Semiconductor fabrication process including silicide stringer removal processing
11/04/2008US7446005 Manufacturable recessed strained RSD structure and process for advanced CMOS
11/04/2008US7446004 Method for reducing overlap capacitance in field effect transistors
11/04/2008US7446003 Manufacturing process for lateral power MOS transistors
11/04/2008US7446002 Method for making a semiconductor device comprising a superlattice dielectric interface layer
11/04/2008US7446001 Method for forming a semiconductor-on-insulator (SOI) body-contacted device with a portion of drain region removed
11/04/2008US7446000 Method of fabricating semiconductor device having gate dielectrics with different thicknesses
11/04/2008US7445999 Fabricating method of a flash memory cell
11/04/2008US7445998 Method for fabricating semiconductor device
11/04/2008US7445997 Methods of forming non-volatile memory devices having floating gate electrodes
11/04/2008US7445996 Low resistance peripheral contacts while maintaining DRAM array integrity
11/04/2008US7445995 Flash memory structure and fabrication method thereof
11/04/2008US7445994 Methods of forming non-volatile memory devices using selective nitridation techniques
11/04/2008US7445993 Method of fabricating non-volatile memory
11/04/2008US7445992 Method for fabricating cell structure of non-volatile memory device
11/04/2008US7445991 Methods of forming a plurality of capacitors
11/04/2008US7445990 Methods of forming a plurality of capacitors
11/04/2008US7445989 Semiconductor device and method of manufacturing the same
11/04/2008US7445988 Trench memory
11/04/2008US7445987 Offset vertical device
11/04/2008US7445986 Memory cells with vertical transistor and capacitor and fabrication methods thereof
11/04/2008US7445985 DRAM memory and method for fabricating a DRAM memory cell
11/04/2008US7445984 Method for removing nanoclusters from selected regions
11/04/2008US7445983 Method of manufacturing a semiconductor integrated circuit device
11/04/2008US7445982 Method of manufacturing a semiconductor integrated circuit device
11/04/2008US7445981 Method for forming a dual metal gate structure
11/04/2008US7445980 Method and apparatus for improving stability of a 6T CMOS SRAM cell
11/04/2008US7445979 Method of fabricating isolated semiconductor devices in epi-less substrate
11/04/2008US7445978 Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS
11/04/2008US7445977 Method of creating defect free high Ge content (> 25%) SiGe-on-insulator (SGOI) substrates using wafer bonding techniques
11/04/2008US7445976 Method of forming a semiconductor device having an interlayer and structure therefor
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