Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2010
01/13/2010CN100580548C Method for using three-dimensional function for mask specification institution
01/13/2010CN100580536C Array base plate for liquid-crystal display device and its production
01/13/2010CN100580532C Motherboard of display panel and production method thereof
01/13/2010CN100580472C Method and integrated circuit for performing test
01/13/2010CN100580435C System and method for process variation monitor
01/13/2010CN100579891C Method for forming microelectronic spring structures on substrate
01/13/2010CN100579727C Polishing pad and its production method
01/12/2010US7647576 Net/wiring selection method, net selection method, wiring selection method, and delay improvement method
01/12/2010US7646951 Apparatus for manufacturing optical fiber Bragg grating, optical fiber, and mid-infrared optical fiber laser
01/12/2010US7646919 Graphics engine for high precision lithography
01/12/2010US7646641 NAND flash memory with nitride charge storage gates and fabrication process
01/12/2010US7646581 Electrostatic chuck
01/12/2010US7646580 Electrostatic chuck and wafer holding member and wafer treatment method
01/12/2010US7646549 Imaging system and method for providing extended depth of focus, range extraction and super resolved imaging
01/12/2010US7646471 Lithographic apparatus, level sensor, method of inspection, device manufacturing method, and device manufactured thereby
01/12/2010US7646468 Lithographic processing cell and device manufacturing method
01/12/2010US7646442 Liquid crystal display device including polycrystalline silicon thin film transistor and method of fabricating the same
01/12/2010US7646441 Electro-optical display device having thin film transistors including a gate insulating film containing fluorine
01/12/2010US7646381 Integrated circuit device mountable on both sides of a substrate and electronic apparatus
01/12/2010US7646218 Architecture and interconnect scheme for programmable logic circuits
01/12/2010US7646105 Integrated circuit package system with package substrate having corner contacts
01/12/2010US7646103 Dicing/die-bonding film, method of fixing chipped work and semiconductor device
01/12/2010US7646102 Wafer level pre-packaged flip chip systems
01/12/2010US7646099 Self-aligned, integrated circuit contact
01/12/2010US7646096 Semiconductor device and manufacturing method thereof
01/12/2010US7646095 Semiconductor device
01/12/2010US7646088 Adhesive sheet for light-emitting diode device and light-emitting diode device
01/12/2010US7646085 Semiconductor device with power source feeding terminals of increased length
01/12/2010US7646081 Low-K dielectric material
01/12/2010US7646079 Semiconductor device, method of manufacturing the same, circuit board, and method of manufacturing the same
01/12/2010US7646077 Methods and structure for forming copper barrier layers integral with semiconductor substrates structures
01/12/2010US7646075 Microelectronic imagers having front side contacts
01/12/2010US7646074 Image sensor and method for manufacturing the same
01/12/2010US7646068 Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit
01/12/2010US7646066 Double gate FET and fabrication process
01/12/2010US7646060 Method and device of field effect transistor including a base shorted to a source region
01/12/2010US7646055 Semiconductor device and method of fabrication thereof
01/12/2010US7646052 DRAM and SRAM mixedly mounted semiconductor device
01/12/2010US7646050 Ferroelectric type semiconductor device having a barrier TiO and TiON type dielectric film
01/12/2010US7646047 Solid-state imaging device and method for manufacturing the same
01/12/2010US7646045 Method for fabricating a nanoelement field effect transistor with surrounded gate structure
01/12/2010US7646044 Thin film transistor and thin film transistor array panel
01/12/2010US7646042 Charge coupled device and solid-state imaging apparatus
01/12/2010US7646040 Boron phosphide-based compound semiconductor device, production method thereof and light emitting diode
01/12/2010US7646038 Method of fabricating heteroepitaxial microstructures
01/12/2010US7646024 Structure and method for reducing forward voltage across a silicon carbide-group III nitride interface
01/12/2010US7646020 Apparatus for observing an assembled state of components and method of observing an assembled state of components using such apparatus
01/12/2010US7646007 Silver-selenide/chalcogenide glass stack for resistance variable memory
01/12/2010US7645996 Microscale gas discharge ion detector
01/12/2010US7645988 Substrate inspection method, method of manufacturing semiconductor device, and substrate inspection apparatus
01/12/2010US7645714 for use in lithography; crack and fracture resistance
01/12/2010US7645713 Substrate processing system and substrate processing method
01/12/2010US7645712 Method of forming contact
01/12/2010US7645711 Semiconductor device fabrication method
01/12/2010US7645710 Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
01/12/2010US7645709 Methods for low temperature oxidation of a semiconductor device
01/12/2010US7645708 Shadow mask deposition of materials using reconfigurable shadow masks
01/12/2010US7645707 Etch profile control
01/12/2010US7645706 Electronic substrate manufacturing method
01/12/2010US7645705 Method of fabricating a semiconductor device having a pre metal dielectric liner
01/12/2010US7645704 vapor phase; microelectromechanical systems, semiconductors
01/12/2010US7645703 Method and structure for aluminum chemical mechanical polishing
01/12/2010US7645702 Manufacturing method of silicon wafer
01/12/2010US7645701 Silicon-on-insulator structures for through via in silicon carriers
01/12/2010US7645700 Dry etchback of interconnect contacts
01/12/2010US7645699 Method of forming a diffusion barrier layer using a TaSiN layer and method of forming a metal interconnection line using the same
01/12/2010US7645698 Method for forming barrier layer
01/12/2010US7645697 Method for forming a dual interlayer dielectric layer of a semiconductor device
01/12/2010US7645696 Deposition of thin continuous PVD seed layers having improved adhesion to the barrier layer
01/12/2010US7645695 Method of manufacturing a semiconductor element
01/12/2010US7645694 Dissolving selected portion of styrene/methyl methacrylate-styrene block polymer with polar supercritical solvent (e.g., chlorotrifluoroethylene) optionally in CO2 as a carrier and removing the dissolved portion
01/12/2010US7645693 Semiconductor device and programming method therefor
01/12/2010US7645692 Semiconductor device and method of manufacturing the same
01/12/2010US7645691 Method for forming zener zap diodes and ohmic contacts in the same integrated circuit
01/12/2010US7645690 Method for producing an integrated circuit having semiconductor zones with a steep doping profile
01/12/2010US7645689 Gallium nitride-based light emitting device having ESD protection capacity and method for manufacturing the same
01/12/2010US7645688 Method of growing non-polar m-plane nitride semiconductor
01/12/2010US7645687 Method to fabricate variable work function gates for FUSI devices
01/12/2010US7645686 Method of bonding chips on a strained substrate and method of placing under strain a semiconductor reading circuit
01/12/2010US7645685 Method for producing a thin IC chip using negative pressure
01/12/2010US7645684 Wafer and method of producing a substrate by transfer of a layer that includes foreign species
01/12/2010US7645682 Bonding interface quality by cold cleaning and hot bonding
01/12/2010US7645681 Bonding method, device produced by this method, and bonding device
01/12/2010US7645680 Method of manufacturing isolation layer pattern in a semiconductor device and isolation layer pattern using the same
01/12/2010US7645679 Method for forming isolation layer in semiconductor devices
01/12/2010US7645678 Process of manufacturing a shallow trench isolation and process of treating bottom surface of the shallow trench for avoiding bubble defects
01/12/2010US7645677 Method for manufacturing semiconductor device
01/12/2010US7645676 Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures
01/12/2010US7645675 Integrated parallel plate capacitors
01/12/2010US7645674 Semiconductor device having an oxide film formed on a semiconductor substrate sidewall of an element region and on a sidewall of a gate electrode
01/12/2010US7645673 Method for generating a deep N-well pattern for an integrated circuit design
01/12/2010US7645672 Mask ROM, method for fabricating the same, and method for coding the same
01/12/2010US7645671 Recessed access device for a memory
01/12/2010US7645670 Method for fabricating nonvolatile memory device
01/12/2010US7645669 Nanotip capacitor
01/12/2010US7645668 Charge trapping type semiconductor memory device and method of manufacturing the same
01/12/2010US7645667 Two-step self-aligned source etch with large process window
01/12/2010US7645666 Method of making a semiconductor device
01/12/2010US7645665 Semiconductor device having shallow b-doped region and its manufacture
01/12/2010US7645664 Layout pattern for deep well region to facilitate routing body-bias voltage