Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2009
12/31/2009US20090321955 Securing integrated circuit dice to substrates
12/31/2009US20090321954 Stacked semiconductor package electrically connecting semiconductor chips using outer surfaces thereof and method for manufacturing the same
12/31/2009US20090321949 Backside mold process for ultra thin substrate and package on package assembly
12/31/2009US20090321948 Method for stacking devices
12/31/2009US20090321947 Surface depressions for die-to-die interconnects and associated systems and methods
12/31/2009US20090321946 Process for fabricating an integrated electronic circuit incorporating a process requiring a voltage threshold between a metal layer and a substrate
12/31/2009US20090321945 Side wall pore sealing for low-k dielectrics
12/31/2009US20090321944 Semiconductor device with improved interconnection of conductor plug
12/31/2009US20090321943 Seed layer for reduced resistance tungsten film
12/31/2009US20090321942 Method of forming stacked trench contacts and structures formed thereby
12/31/2009US20090321941 Phase memorization for low leakage dielectric films
12/31/2009US20090321940 Method for Manufacturing Contact Openings, Method for Manufacturing an Integrated Circuit, an Integrated Circuit
12/31/2009US20090321938 Methods of Manufacturing Copper Interconnect Systems
12/31/2009US20090321937 Semiconductor device and method of manufacturing same
12/31/2009US20090321936 Semiconductor device manufacturing method, semiconductor device manufacturing apparatus, semiconductor device, computer program and storage medium
12/31/2009US20090321935 Methods of forming improved electromigration resistant copper films and structures formed thereby
12/31/2009US20090321934 Self-aligned cap and barrier
12/31/2009US20090321933 Structure to Facilitate Plating Into High Aspect Ratio Vias
12/31/2009US20090321932 Coreless substrate package with symmetric external dielectric layers
12/31/2009US20090321930 Semiconductor with bottom-side wrap-around flange contact
12/31/2009US20090321929 Standing chip scale package
12/31/2009US20090321928 Flip chip assembly process for ultra thin substrate and package on package assembly
12/31/2009US20090321927 Semiconductor device and manufacturing method for the same
12/31/2009US20090321926 Mounting structure and mounting method
12/31/2009US20090321923 Magnetic particle-based composite materials for semiconductor packages
12/31/2009US20090321922 Self-healing thermal interface materials for semiconductor packages
12/31/2009US20090321920 Semiconductor device and method of manufacturing the same
12/31/2009US20090321916 Semiconductor structure, method for manufacturing semiconductor structure and semiconductor package
12/31/2009US20090321915 System-in-package and manufacturing method of the same
12/31/2009US20090321914 Production of integrated circuit chip packages prohibiting formation of micro solder balls
12/31/2009US20090321912 Semiconductor device and method of manufacturing the same
12/31/2009US20090321911 Semiconductor Package and Manufacturing Method Thereof
12/31/2009US20090321908 Stacked integrated circuit package system with intra-stack encapsulation
12/31/2009US20090321907 Stacked integrated circuit package system
12/31/2009US20090321906 Semiconductor device with package to package connection
12/31/2009US20090321903 Semiconductor device and manufacturing method thereof
12/31/2009US20090321901 Thermally balanced heat sinks
12/31/2009US20090321897 Method and apparatus of power ring positioning to minimize crosstalk
12/31/2009US20090321896 Semiconductor device and its manufacturing method
12/31/2009US20090321895 Silicon thin-film and method of forming silicon thin-film
12/31/2009US20090321894 Multi-functional linear siloxane compound, a siloxane polymer prepared from the compound, and a process for forming a dielectric film by using the polymer
12/31/2009US20090321891 Method and apparatus for generating reticle data
12/31/2009US20090321887 Method of fabricating an electromechanical structure including at least one mechanical reinforcing pillar
12/31/2009US20090321886 Epitaxial lift off stack having a unidirectionally shrunk handle and methods thereof
12/31/2009US20090321885 Epitaxial lift off stack having a universally shrunk handle and methods thereof
12/31/2009US20090321884 Method of fabricating an epitaxially grown layer
12/31/2009US20090321883 Silicon substrate for solid-state imaging device and method for manufacturing the same
12/31/2009US20090321882 Epitazial growth of crystalline material
12/31/2009US20090321881 Epitaxial lift off stack having a pre-curved handle and methods thereof
12/31/2009US20090321879 Silicided base structure for high frequency transistors
12/31/2009US20090321877 Semiconductor device and method of manufacturing the same
12/31/2009US20090321876 System with radio frequency integrated circuits
12/31/2009US20090321875 Semiconductor device and fabrication method thereof
12/31/2009US20090321874 Epitaxial wafer and production method thereof
12/31/2009US20090321873 Low-cost substrates having high-resistivity properties and methods for their manufacture
12/31/2009US20090321872 Low cost substrates and method of forming such substrates
12/31/2009US20090321871 Chip Pad Resistant to Antenna Effect and Method
12/31/2009US20090321870 Shuttle wafer and method of fabricating the same
12/31/2009US20090321867 Method for production of packaged electronic components, and a packaged electronic component
12/31/2009US20090321863 Method and apparatus providing an imager module with a permanent carrier
12/31/2009US20090321860 Integrated circuit having a magnetic tunnel junction device and method
12/31/2009US20090321859 System and Method to Fabricate Magnetic Random Access Memory
12/31/2009US20090321857 Systems and methods for reduced stress anchors
12/31/2009US20090321856 Self-aligned insulating etchstop layer on a metal contact
12/31/2009US20090321855 Boundaries with elevated deuterium levels
12/31/2009US20090321852 Semiconductor device and method of manufacturing the same
12/31/2009US20090321851 Semiconductor device and method of fabricating the same
12/31/2009US20090321850 Threshold adjustment for MOS devices by adapting a spacer width prior to implantation
12/31/2009US20090321849 Semiconductor device, integrated circuit, and semiconductor manufacturing method
12/31/2009US20090321847 High performance cmos devices comprising gapped dual stressors with dielectric gap fillers, and methods of fabricating the same
12/31/2009US20090321845 Short channel lv, mv, and hv cmos devices
12/31/2009US20090321844 Semiconductor device
12/31/2009US20090321843 Cmos device comprising mos transistors with recessed drain and source areas and a si/ge material in the drain and source areas of the pmos transistor
12/31/2009US20090321842 Method for manufacturing semiconductor device including metal gate electrode and semiconductor device
12/31/2009US20090321841 Cmos device comprising mos transistors with recessed drain and source areas and non-conformal metal silicide regions
12/31/2009US20090321840 Strained semiconductor device
12/31/2009US20090321839 Semiconductor device and method for manufacturing the same
12/31/2009US20090321838 Cmos device and method of manufacturing same
12/31/2009US20090321837 Contact trenches for enhancing stress transfer in closely spaced transistors
12/31/2009US20090321836 Double gate and tri-gate transistor formed on a bulk substrate and method for forming the transistor
12/31/2009US20090321834 Substrate fins with different heights
12/31/2009US20090321833 VERTICAL PROFILE FinFET GATE FORMED VIA PLATING UPON A THIN GATE DIELECTRIC
12/31/2009US20090321829 Low-cost double-structure substrates and methods for their manufacture
12/31/2009US20090321828 Structures, fabrication methods, design structures for strained fin field effect transistors (finfets)
12/31/2009US20090321825 Semiconductor device and method for fabricating the same, bipolar-cmos-dmos and method for fabricating the same
12/31/2009US20090321824 Semiconductor device
12/31/2009US20090321820 Semiconductor device and method for production of semiconductor device
12/31/2009US20090321818 Semiconductor component with two-stage body zone
12/31/2009US20090321817 Structure and Method for Forming a Shielded Gate Trench FET with an Inter-Electrode Dielectric Having a Nitride Layer Therein
12/31/2009US20090321814 Semiconductor memory device and manufacturing method of the same
12/31/2009US20090321813 Nonvolatile semiconductor memory device and method for manufacturing same
12/31/2009US20090321812 Semiconductor device and method for manufacturing thereof
12/31/2009US20090321809 Graded oxy-nitride tunnel barrier
12/31/2009US20090321808 Structures, fabrication methods, and design structures for multiple bit flash memory cells
12/31/2009US20090321806 Nonvolatile memory with floating gates with upward protrusions
12/31/2009US20090321805 Insulator material over buried conductive line
12/31/2009US20090321804 Semiconductor component including a drift zone and a drift control zone
12/31/2009US20090321803 Semiconductor device and method of manufacturing the same
12/31/2009US20090321801 Capacitor insulating film, method for fabricating the same, capacitor element, method for fabricating the same, semiconductor memory device, and method for fabricating the same
12/31/2009US20090321796 Semiconductor device and method of fabricating the same
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