Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2011
01/13/2011WO2010104857A3 Process for forming an electroactive layer
01/13/2011WO2010104610A3 Stacked microelectronic assembly with microelectronic elements having vias extending through bond pads
01/13/2011WO2010102272A3 Process for forming an electroactive layer
01/13/2011WO2010102187A3 Stacked load-lock apparatus and method for high throughput solar cell manufacturing
01/13/2011WO2010102161A3 Inductively coupled plasma reactor having rf phase control and methods of use thereof
01/13/2011WO2010102101A3 Gas flow set-up for multiple, interacting reactive sputter sources
01/13/2011WO2010102089A3 Methods for depositing layers having reduced interfacial contamination
01/13/2011WO2010049495A3 Thin-film solar cell device with curved edges
01/13/2011US20110010482 Self-Healing Chip-to-Chip Interface
01/13/2011US20110009999 Plasma reactor with rf generator and automatic impedance match with minimum reflected power-seeking control
01/13/2011US20110008973 Laser annealing method and apparatus
01/13/2011US20110008972 Methods for forming an ald sio2 film
01/13/2011US20110008971 Processes for the production of organometallic compounds
01/13/2011US20110008970 Methods of Forming Semiconductor Constructions
01/13/2011US20110008969 Frequency doubling using spacer mask
01/13/2011US20110008968 Method and material for forming a double exposure lithography pattern
01/13/2011US20110008967 Cmp slurry and a polishing method using the same
01/13/2011US20110008966 Planarization method using hybrid oxide and polysilicon cmp
01/13/2011US20110008965 Polishing composition and polishing method
01/13/2011US20110008964 Systems and methods for delivery of fluid-containing process material combinations
01/13/2011US20110008963 Method for making conductive film and film making equipment
01/13/2011US20110008962 Method for fabricating a multilayer microstructure with balancing residual stress capability
01/13/2011US20110008961 Method for fabricating integrated circuit structures
01/13/2011US20110008960 Method of fabricating semiconductor device
01/13/2011US20110008959 Method of etching a semiconductor wafer
01/13/2011US20110008958 Methods of Selectively Growing Nickel-Containing Materials
01/13/2011US20110008957 Metal interconnection method of semiconductor device
01/13/2011US20110008956 Self-assembly pattern for semiconductor integrated circuit
01/13/2011US20110008955 Method of manufacturing semiconductor device and substrate processing apparatus
01/13/2011US20110008954 Insulating buffer film and high dielectric constant semiconductor device and method for fabricating the same
01/13/2011US20110008953 Method for making semiconductor insulated-gate field-effect transistor having multilayer deposited metal source(s) and/or drain(s)
01/13/2011US20110008952 Method and apparatus for manufacturing semiconductor device
01/13/2011US20110008951 Method of manufacturing strained-silicon semiconductor device
01/13/2011US20110008950 Remote Hydrogen Plasma With Ion Filter for Terminating Silicon Dangling Bonds
01/13/2011US20110008949 Adhesive sheet for dicing semiconductor wafer and method for dicing semiconductor wafer using the same
01/13/2011US20110008948 Method for transferring an epitaxial layer
01/13/2011US20110008947 Apparatus and method for performing multifunction laser processes
01/13/2011US20110008946 Manufacturing methods of SOI substrate and semiconductor device
01/13/2011US20110008945 Nonvolatile memory device made of resistance material and method of fabricating the same
01/13/2011US20110008944 Gate Electrodes of HVMOS Devices Having Non-Uniform Doping Concentrations
01/13/2011US20110008943 Semiconductor device and a method of manufacturing the same
01/13/2011US20110008942 Semiconductor device having asymmetric bulb-type recess gate and method for manufacturing the same
01/13/2011US20110008941 Method for fabricating semiconductor device
01/13/2011US20110008940 Self-aligned v-channel mosfet
01/13/2011US20110008939 Method of making a trench MOSFET having improved avalanche capability using three masks process
01/13/2011US20110008938 Thin film and method for manufacturing semiconductor device using the thin film
01/13/2011US20110008937 Silicon germanium and germanium multigate and nanowire structures for logic and multilevel memory applications
01/13/2011US20110008936 Semiconductor Device Having Grooved Leads to Confine Solder Wicking
01/13/2011US20110008934 Near chip scale package integration process
01/13/2011US20110008933 Dual side cooling integrated power device module and methods of manufacture
01/13/2011US20110008932 Method of manufacturing semiconductor package
01/13/2011US20110008931 Method for manufacturing semiconductor device
01/13/2011US20110008930 Method for manufacturing semiconductor device
01/13/2011US20110008928 Method for etching a see-through thin film solar module
01/13/2011US20110008919 Electronic Textiles with Electronic Devices on Ribbons
01/13/2011US20110008917 High-power optical burn-in
01/13/2011US20110008916 Proximity Head Heating Method and Apparatus
01/13/2011US20110008915 Method for use in making electronic devices having thin-film magnetic components
01/13/2011US20110008545 Film forming method, film forming apparatus, pattern forming method, and manufacturing method of semiconductor apparatus
01/13/2011US20110008148 Substrate transporting apparatus, substrate platform shelf and substrate processing apparatus
01/13/2011US20110008145 Method of, and apparatus for, separating wafers from a wafer stack
01/13/2011US20110008144 Pick and place apparatus for electronic device inspection equipment, picking apparatus thereof, and method for loading electronic devices onto loading element
01/13/2011US20110008136 Reduced capacity carrier, transport load port, buffer system
01/13/2011US20110007771 Semiconductor laser apparatus, method of manufacturing the same and optical apparatus
01/13/2011US20110007767 Semiconductor Component and Method for Producing a Semiconductor Component
01/13/2011US20110007761 Temperature control device for optoelectronic devices
01/13/2011US20110007596 Low-Leakage Power Supply Architecture for an SRAM Array
01/13/2011US20110007555 Resistance change element, semiconductor memory device, manufacturing method and driving method thereof
01/13/2011US20110007546 Anti-Parallel Diode Structure and Method of Fabrication
01/13/2011US20110007447 Substrate holder, substrate holder unit, substrate transport apparatus, and substrate bonding apparatus
01/13/2011US20110007285 Lithographic apparatus and device manufacturing method
01/13/2011US20110007234 Tft-lcd array substrate and manufacturing method thereof
01/13/2011US20110007044 Semiconductor Device, and Display Device and Electronic Device Utilizing the Same
01/13/2011US20110006998 Patterning of thin film conductive and passivation layers
01/13/2011US20110006874 Micromechanical actuator
01/13/2011US20110006667 Security and/or valuable document having a type ii semiconductor contact system
01/13/2011US20110006444 Micromechanical component and method for producing a micromechancal component having a thin-lawyer cap
01/13/2011US20110006440 System and method to reduce the bondwire/trace inductance
01/13/2011US20110006436 Conductive Via Plug Formation
01/13/2011US20110006435 Semiconductor device and method of manufacturing the same
01/13/2011US20110006434 Under land routing
01/13/2011US20110006433 Electronic device and manufacturing method therefor
01/13/2011US20110006432 Reconstituted wafer stack packaging with after-applied pad extensions
01/13/2011US20110006431 Method for aligning and bonding elements and a device comprising aligned and bonded elements
01/13/2011US20110006422 Structures and methods to improve lead-free C4 interconnect reliability
01/13/2011US20110006419 Film for use in manufacturing semiconductor device, method for producing semiconductor device and semiconductor device
01/13/2011US20110006417 Semiconductor device and method of manufacturing semiconductor device
01/13/2011US20110006416 Structure and method for forming pillar bump structure having sidewall protection
01/13/2011US20110006415 Solder interconnect by addition of copper
01/13/2011US20110006412 Semiconductor chip package and method for manufacturing thereof and stack package using the same
01/13/2011US20110006408 Chip package and manufacturing method thereof
01/13/2011US20110006407 Semiconductor device with channel stop trench and method
01/13/2011US20110006406 Fabrication of porogen residues free and mechanically robust low-k materials
01/13/2011US20110006405 Semiconductor device, manufacture method of semiconductor device, and electronic apparatus
01/13/2011US20110006404 Structure and method of wafer level chip molded packaging
01/13/2011US20110006403 Semiconductor device and the method for manufacturing the same
01/13/2011US20110006401 Method and system for combining photomasks to form semiconductor devices
01/13/2011US20110006400 Handle wafer having viewing windows
01/13/2011US20110006399 Semiconductor wafer and semiconductor wafer manufacturing method
01/13/2011US20110006398 Process, apparatus, and material for making silicon germanium core fiber