Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2011
01/11/2011US7867919 Method of fabricating an apparatus having a lanthanum-metal oxide dielectric layer
01/11/2011US7867918 Semiconductor topography including a thin oxide-nitride stack and method for making the same
01/11/2011US7867917 Etch stop layer for a metallization layer with enhanced adhesion, etch selectivity and hermeticity
01/11/2011US7867916 Horizontal coffee-stain method using control structure to pattern self-organized line structures
01/11/2011US7867915 Method for activating nitride surfaces for amine-reactive chemistry
01/11/2011US7867914 System and method for forming an integrated barrier layer
01/11/2011US7867913 Method for fabricating fine pattern in semiconductor device
01/11/2011US7867912 Methods of manufacturing semiconductor structures
01/11/2011US7867911 Method for forming pattern using hard mask
01/11/2011US7867910 Method of accessing semiconductor circuits from the backside using ion-beam and gas-etch
01/11/2011US7867909 contains at least one water soluble polymer selected from polyvinylpyrrolidone and poly(N-vinylformamide), and an alkali, and preferably further contains at least one of a chelating agent and an abrasive grain of colloidal silica or fumed silica; for a finish stage of preliminary polishing
01/11/2011US7867908 Method of fabricating substrate
01/11/2011US7867907 Method for manufacturing semiconductor device
01/11/2011US7867906 Semiconductor device and method for manufacturing same
01/11/2011US7867905 System and method for semiconductor processing
01/11/2011US7867904 Method and system for isolated and discretized process sequence integration
01/11/2011US7867903 Passivated thin film and method of producing same
01/11/2011US7867902 Methods of forming a contact structure
01/11/2011US7867901 Method for forming silicide in semiconductor device
01/11/2011US7867900 integrating a conductive contact with a cobalt silicide region of a semiconductor device with low resistivity and low diffusion of impurities into the metal contact
01/11/2011US7867899 Wordline resistance reduction method and structure in an integrated circuit memory device
01/11/2011US7867898 Method forming ohmic contact layer and metal wiring in semiconductor device
01/11/2011US7867897 Low leakage metal-containing cap process using oxidation
01/11/2011US7867896 Sequential deposition of tantalum nitride using a tantalum-containing precursor and a nitrogen-containing precursor
01/11/2011US7867895 Method of fabricating improved interconnect structure with a via gouging feature absent profile damage to the interconnect dielectric
01/11/2011US7867894 Method for producing substrate
01/11/2011US7867892 Packaging carrier with high heat dissipation and method for manufacturing the same
01/11/2011US7867891 Dual metal interconnects for improved gap-fill, reliability, and reduced capacitance
01/11/2011US7867890 Manufacturing method of semiconductor device and semiconductor device
01/11/2011US7867889 Method of forming an interconnect structure on an integrated circuit die
01/11/2011US7867888 Flip-chip package substrate and a method for fabricating the same
01/11/2011US7867887 Structure and method for enhancing resistance to fracture of bonding pads
01/11/2011US7867886 Method of enclosing a micro-electromechanical element
01/11/2011US7867885 Post structure, semiconductor device and light emitting device using the structure, and method for forming the same
01/11/2011US7867884 Sample wafer fabrication method
01/11/2011US7867883 Methods of fabricating non-volatile memory devices
01/11/2011US7867882 Method of manufacturing silicon carbide semiconductor device
01/11/2011US7867881 Method of manufacturing nitride semiconductor substrate
01/11/2011US7867880 Metal precursors for low temperature deposition and methods of forming a metal thin layer and manufacturing a phase-change memory device using the metal precursors
01/11/2011US7867879 Method for dividing a semiconductor substrate and a method for producing a semiconductor circuit arrangement
01/11/2011US7867878 Stacked semiconductor chips
01/11/2011US7867877 Method for manufacturing SOI wafer
01/11/2011US7867876 Method of thinning a semiconductor substrate
01/11/2011US7867874 Method and apparatus for packaging circuit devices
01/11/2011US7867873 Manufacturing method of a semiconductor substrate using a damaged region
01/11/2011US7867872 Method for manufacturing semiconductor device with uniform concentration ion doping in recess gate channel region
01/11/2011US7867871 System and method for increasing breakdown voltage of LOCOS isolated devices
01/11/2011US7867870 Semiconductor device and method for forming device isolation film of semiconductor device
01/11/2011US7867869 Laminated thin-film device, manufacturing method thereof, and circuit
01/11/2011US7867868 Absorber layer candidates and techniques for application
01/11/2011US7867867 Methods of manufacturing semiconductor devices
01/11/2011US7867866 SOI FET with source-side body doping
01/11/2011US7867865 Methods of fabricating semiconductor devices including elevated source and drain regions
01/11/2011US7867864 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method
01/11/2011US7867863 Method for forming self-aligned source and drain contacts using a selectively passivated metal gate
01/11/2011US7867862 Semiconductor structure including high voltage device
01/11/2011US7867861 Semiconductor device employing precipitates for increased channel stress
01/11/2011US7867860 Strained channel transistor formation
01/11/2011US7867859 Gate electrode with depletion suppression and tunable workfunction
01/11/2011US7867858 Hybrid transistor based power gating switch circuit and method
01/11/2011US7867857 Transistor and method for manufacturing same
01/11/2011US7867856 Method of manufacturing a semiconductor device having fin-field effect transistor
01/11/2011US7867854 Method of fabricating power semiconductor device
01/11/2011US7867853 Method of manufacturing semiconductor device and semiconductor Fin-shaped channel
01/11/2011US7867852 Super-self-aligned trench-dmos structure and method
01/11/2011US7867851 Methods of forming field effect transistors on substrates
01/11/2011US7867850 Enhanced multi-bit non-volatile memory device with resonant tunnel barrier
01/11/2011US7867849 Method of manufacturing a non-volatile semiconductor device
01/11/2011US7867848 Methods for fabricating dual bit flash memory devices
01/11/2011US7867847 Method of manufacturing dielectric film that has hafnium-containing and aluminum-containing oxynitride
01/11/2011US7867846 Organic light emitting display (OLED) having a gas vent groove to decrease edge open failures
01/11/2011US7867844 Methods of forming NAND cell units
01/11/2011US7867843 Gate structures for flash memory and methods of making same
01/11/2011US7867842 Method and apparatus for forming planar alloy deposits on a substrate
01/11/2011US7867841 Methods of forming semiconductor devices with extended active regions
01/11/2011US7867840 Semiconductor device and method of fabricating the same
01/11/2011US7867839 Method to reduce threshold voltage (Vt) in silicon germanium (SiGe), high-k dielectric-metal gate, p-type metal oxide semiconductor field effect transistors
01/11/2011US7867838 Semiconductor device and method for manufacturing the same
01/11/2011US7867837 Process for manufacturing rounded polysilicon electrodes on semiconductor components
01/11/2011US7867836 Method for manufacturing junction semiconductor device
01/11/2011US7867834 Manufacturing method of semiconductor device capable of forming the line width of a gate
01/11/2011US7867833 Semiconductor device utilizing a metal gate material such as tungsten and method of manufacturing the same
01/11/2011US7867831 Manufacturing method of flash memory device comprising gate columns penetrating through a cell stack
01/11/2011US7867829 Semiconductor device manufacturing method, semiconductor wafer, and semiconductor device
01/11/2011US7867828 Method of fabricating a semiconductor device including forming an insulating layer with a hard sheet buried therein
01/11/2011US7867827 Physical quantity sensor, lead frame, and manufacturing method therefor
01/11/2011US7867826 Semiconductor device packaged into chip size and manufacturing method thereof
01/11/2011US7867825 Semiconductor die with protective layer and related method of processing a semiconductor wafer
01/11/2011US7867824 Methods of fabricating a large area transducer array
01/11/2011US7867823 Method for fabricating a semiconductor package
01/11/2011US7867822 Semiconductor memory device
01/11/2011US7867821 Integrated circuit package system with through semiconductor vias and method of manufacture thereof
01/11/2011US7867820 Methods for forming co-planar wafer-scale chip packages
01/11/2011US7867819 Semiconductor package including flip chip controller at bottom of die stack
01/11/2011US7867818 Methods and apparatuses for providing stacked-die devices
01/11/2011US7867817 Method for manufacturing a wafer level package
01/11/2011US7867816 Method and system for innovative substrate/package design for a high performance integrated circuit chipset
01/11/2011US7867815 Spacer electrode small pin phase change RAM and manufacturing method
01/11/2011US7867814 manufacturing a resistance memory element by forming a lower electrode over a substrate, forming a first insulating film on the lower electrode, forming a plurality of cylindrical electrodes of a cylindrical structure of carbon on the insulating film, forming a second insulating film and upper electrode
01/11/2011US7867812 Method for production of thin semiconductor solar cells and integrated circuits