Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2011
01/19/2011CN101266941B Dual damascene process
01/19/2011CN101258415B Electronic parts tester
01/19/2011CN101252145B Carbon nanometer tube nano electronic device and manufacturing method thereof
01/19/2011CN101252118B Semiconductor device and method for producing the same
01/19/2011CN101245470B Method for producing nano-scale gap metal electrode pair
01/19/2011CN101241973B Method for manufacturing organic electroluminescent element and method for manufacturing display
01/19/2011CN101211963B Organic light emitting display and fabricating method thereof
01/19/2011CN101192587B Semiconductor device manufacturing method
01/19/2011CN101187058B Silicon wafer for semiconductor and manufacturing method thereof
01/19/2011CN101178500B Conveying clamp for substrate assembling device and conveying method
01/19/2011CN101156237B Electronic device provided with wiring board, method for manufacturing such electronic device and wiring board used for such electronic device
01/19/2011CN101154684B High withstand voltage transistor and manufacturing method thereof, and semiconductor device adopting high withstand voltage transistor
01/19/2011CN101154647B Semiconductor apparatus
01/19/2011CN101154609B Apparatus and method for testing conductive bumps
01/19/2011CN101140933B Semiconductor device and method of manufacture thereof
01/19/2011CN101134265B Laser processing method and method of cutting semiconductor material substrate
01/19/2011CN101118913B Display device and method of manufacturing the display device
01/19/2011CN101090108B Composite semiconductor device and method of manufacturing the same
01/19/2011CN101082781B Tracing system and method, exposure parameter calculating device and method, substrate manufacturing method
01/19/2011CN101076883B Structure and method of making interconnect element, and multilayer wiring board including the interconnect element
01/19/2011CN101071813B Structure and method for determining gradient field of process environment
01/19/2011CN101066583B Method of processing a surface of group III nitride crystal and group III nitride crystal substrate
01/19/2011CN101047130B Top-gate thin-film transistors using nanoparticles and method of manufacturing the same
01/19/2011CN101038936B Semiconductor-on-insulator substrate and devices, and methods for forming the same
01/19/2011CN101036420B Microwave plasma processing apparatus
01/19/2011CN101023026B Methods, devices and compositions for depositing and orienting nanostructures
01/19/2011CA2719927A1 Laser ashing of polyimide for semiconductor manufacturing
01/18/2011US7872850 Wall crawling robots
01/18/2011US7872699 Thin film transistor array panel and liquid crystal display including the panel
01/18/2011US7872698 Liquid crystal display with structure resistant to exfoliation during fabrication
01/18/2011US7872686 Integrated lens and chip assembly for a digital camera
01/18/2011US7872521 CCD device and method of driving same
01/18/2011US7872358 Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device
01/18/2011US7872349 Integrated coolant circuit arrangement, operating method and production method
01/18/2011US7872339 Vertically stacked pre-packaged integrated circuit chips
01/18/2011US7872333 Layer system comprising a silicon layer and a passivation layer, method for production a passivation layer on a silicon layer and the use of said system and method
01/18/2011US7872332 Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods
01/18/2011US7872331 Nitride semiconductor wafer
01/18/2011US7872317 Dual metal gate self-aligned integration
01/18/2011US7872313 Semiconductor device having an expanded storage node contact and method for fabricating the same
01/18/2011US7872310 Semiconductor structure and system for fabricating an integrated circuit chip
01/18/2011US7872306 Structure of trench MOSFET and method for manufacturing the same
01/18/2011US7872304 Method and apparatus for controlling a circuit with a high voltage sense device
01/18/2011US7872303 FinFET with longitudinal stress in a channel
01/18/2011US7872302 Semiconductor device having vertical transistor formed on an active pattern protruding from a substrate
01/18/2011US7872301 Semiconductor device and method of manufacturing the same
01/18/2011US7872300 Power semiconductor component with plate capacitor structure
01/18/2011US7872294 Semiconductor device having a capacitance element and method of manufacturing the same
01/18/2011US7872291 Enhanced atomic layer deposition
01/18/2011US7872290 Recess transistor (TR) gate to obtain large self-aligned contact (SAC) open margin
01/18/2011US7872274 n-Electrode for III group nitride based compound semiconductor element
01/18/2011US7872268 Substrate buffer structure for group III nitride devices
01/18/2011US7872265 Electrical switching device and method of embedding catalytic material in a diamond substrate
01/18/2011US7872257 Organic thin film transistor array and method of manufacturing the same
01/18/2011US7872253 Thermoelectric material, infrared sensor and image forming device
01/18/2011US7872252 Method of fabricating semiconductor devices on a group IV substrate with controlled interface properties and diffusion tails
01/18/2011US7872247 Ion beam guide tube
01/18/2011US7872246 Laser annealing method and semiconductor device fabricating method
01/18/2011US7872237 Circuit substrate and method
01/18/2011US7872210 Method for the connection of two wafers, and a wafer arrangement
01/18/2011US7872209 Thermal flux processing by scanning a focused line beam
01/18/2011US7872130 3'-N,N-dimethylamino-3,8'-dimethyl-8-(N-methylamino)-7'-oxo-10,5'-diphenyl-5',7'-dihydro-[2,2']biphenazinyl-10-ium chloride; copper plating bath for bright, ductile copper coating, contains as an additive a mixture of oligomeric phenazinium compound (containing two and three monomeric units)
01/18/2011US7871942 making a high K (dielectric constant) film using an ultra-high purity hafnium containing silicate film in a metal-oxide-semiconductor (CMOS) field effect transistor (FET) or MOSFET
01/18/2011US7871941 Method for reducing resist poisoning during patterning of stressed nitrogen-containing layers in a semiconductor device
01/18/2011US7871940 Apparatus and process for producing thin films and devices
01/18/2011US7871939 Method for manufacturing semiconductor device using a free radical assisted chemical vapor deposition nitrifying process
01/18/2011US7871938 Producing method of semiconductor device and substrate processing apparatus
01/18/2011US7871937 Process and apparatus for treating wafers
01/18/2011US7871936 Method of manufacturing active matrix display device
01/18/2011US7871935 Non-plasma capping layer for interconnect applications
01/18/2011US7871934 Method for an integrated circuit contact
01/18/2011US7871933 Combined stepper and deposition tool
01/18/2011US7871932 Manufacturing method of semiconductor device
01/18/2011US7871931 Method for chemical mechanical planarization of a metal layer located over a photoresist layer and a method for manufacturing a micro pixel array using the same
01/18/2011US7871930 Method of manufacturing a light emitting device and thin film forming apparatus
01/18/2011US7871929 Method of forming semiconductor devices containing metal cap layers
01/18/2011US7871928 Methods for discretized processing of regions of a substrate
01/18/2011US7871927 Wafer via formation
01/18/2011US7871926 Methods and systems for forming at least one dielectric layer
01/18/2011US7871925 Stack package and method for manufacturing the same
01/18/2011US7871924 Semiconductor device having copper wiring
01/18/2011US7871923 Self-aligned air-gap in interconnect structures
01/18/2011US7871922 Methods for forming interconnect structures that include forming air gaps between conductive structures
01/18/2011US7871921 Methods of forming interconnection structures for semiconductor devices
01/18/2011US7871920 Semiconductor chips with reduced stress from underfill at edge of chip
01/18/2011US7871919 Structures and methods for improving solder bump connections in semiconductor devices
01/18/2011US7871918 Manufacturing method of contact structure
01/18/2011US7871917 Semiconductor device and manufacturing method for the same
01/18/2011US7871916 Transistor gate electrode having conductor material layer
01/18/2011US7871915 Method for forming metal gates in a gate last process
01/18/2011US7871914 Methods of fabricating semiconductor devices with enlarged recessed gate electrodes
01/18/2011US7871913 Method for manufacturing semiconductor device having vertical transistor
01/18/2011US7871912 Methods of making semiconductor-based electronic devices by forming freestanding semiconductor structures
01/18/2011US7871911 Methods for fabricating semiconductor device structures
01/18/2011US7871910 Flash memory device and method of fabricating the same
01/18/2011US7871909 Methods of using single spacer to triple line/space frequency
01/18/2011US7871908 Method of manufacturing semiconductor device
01/18/2011US7871907 Mask and method of fabricating a polysilicon layer using the same
01/18/2011US7871906 Storage nodes including a phase chang layer and methods of manufacturing and operating the same, phase change memory devices and methods of manufacturing and operating the same
01/18/2011US7871905 Method for producing semiconductor device