Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2011
06/15/2011CN102097389A LDMOS (laterally diffused metal oxide semiconductor), semiconductor device integrated with same and manufacturing method thereof
06/15/2011CN102097388A Method for integrating photodiode in CMOS process
06/15/2011CN102097387A Methods of forming nonvolatile memory devices
06/15/2011CN102097386A Method for manufacturing grid of EEPROM (Electronically Erasable Programmable Read-Only Memory) and grid thereby
06/15/2011CN102097385A Method for manufacturing two-bit flash memory
06/15/2011CN102097384A Method for manufacturing storage device
06/15/2011CN102097383A Method for manufacturing double-bit flash memory
06/15/2011CN102097382A Method for manufacturing semiconductor device
06/15/2011CN102097381A CMOS (Complementary Metal-Oxide-Semiconductor) transistor and stress memory treatment method thereof
06/15/2011CN102097380A Method for forming CMOS (Complementary Metal Oxide Semiconductor) structure
06/15/2011CN102097379A Method for manufacturing semiconductor device layer
06/15/2011CN102097378A Method for manufacturing trench metal-oxide semiconductor field effect transistor (MOSFET)
06/15/2011CN102097377A Making method of semiconductor device
06/15/2011CN102097376A Method for manufacturing semiconductor device
06/15/2011CN102097375A Method for manufacturing semiconductor device having buried gate
06/15/2011CN102097374A Phase change random access memory and manufacturing method thereof
06/15/2011CN102097373A Cutting device
06/15/2011CN102097372A Wafer processing method
06/15/2011CN102097371A Substrate dividing device and substrate dividing method using the same
06/15/2011CN102097370A Method for processing precision patterns
06/15/2011CN102097369A Array substrate for display device
06/15/2011CN102097368A Manufacturing method of low-temperature polysilicon thin film transistor array substrate
06/15/2011CN102097367A Method for integrating Cu and ferric oxide functional film
06/15/2011CN102097366A Active area bonding compatible high current structures
06/15/2011CN102097365A Manufacturing method of semiconductor device
06/15/2011CN102097364A Hardmask materials
06/15/2011CN102097363A Metal interconnecting method
06/15/2011CN102097362A Method for forming mask layer and etching method
06/15/2011CN102097361A Forming method of dual-damascene structure
06/15/2011CN102097360A Method for etching connection hole
06/15/2011CN102097359A Contact hole and method for etching same
06/15/2011CN102097358A Shallow trench isolation groove
06/15/2011CN102097357A Method for making isolation structure
06/15/2011CN102097356A Method for making shallow trench isolation structure
06/15/2011CN102097355A Method for making shallow trench isolation region
06/15/2011CN102097354A Method for forming pressure resistant region of power device
06/15/2011CN102097353A Method of protecting a bond layer in a substrate support adapted for use in a plasma processing system
06/15/2011CN102097352A Disk fixing device
06/15/2011CN102097351A Elastic unit exerting two angled force components on an abutting section of an align fixture
06/15/2011CN102097350A Combination device
06/15/2011CN102097349A Chip unloading device for semiconductor package process
06/15/2011CN102097348A Electric test structure and method for measuring epitaxial graphic offset
06/15/2011CN102097347A Manufacturing method of semiconductor integrated circuit device
06/15/2011CN102097346A Power semiconductor package
06/15/2011CN102097345A Method for directly depositing metal line patterns on surface of insulating base material
06/15/2011CN102097344A Producing method of semiconductor device
06/15/2011CN102097343A Wire bonding method for copper wire and support plate pad and structure
06/15/2011CN102097342A Packaging system and method for controlling thickness of chip loading adhesive
06/15/2011CN102097341A Manufacturing method for semiconductor device
06/15/2011CN102097340A Method for manufacturing SMD (surface mounted device) by COB (chip on board) glue filling and encapsulating
06/15/2011CN102097339A Semiconductor device and method of manufacturing the same
06/15/2011CN102097338A Wafer-scale encapsulation process of electronic devices
06/15/2011CN102097337A Method and apparatus for semiconductor device fabrication using a reconstituted wafer
06/15/2011CN102097336A Semiconductor structure and manufacturing method thereof
06/15/2011CN102097335A Packaging structure and packaging process thereof
06/15/2011CN102097334A Manufacture method for wiring board and stitch arrangement device
06/15/2011CN102097333A Method for designing circuit board, circuit board and electronic device
06/15/2011CN102097332A Conduction hole structure of encapsulation substrate and manufacturing method thereof
06/15/2011CN102097331A Circuit bridging manufacturing method for encapsulation substrate
06/15/2011CN102097330A Conduction structure of encapsulation substrate and manufacturing method thereof
06/15/2011CN102097329A Embedded conduction structure of encapsulation substrate and manufacturing method thereof
06/15/2011CN102097328A Method for manufacturing high-power field effect transistor
06/15/2011CN102097327A Dual channel trench LDMOS transistors and BCD process with deep trench isolation
06/15/2011CN102097326A Method for making a charge balanced multi-nano shell drift region for superjunction semiconductor device
06/15/2011CN102097325A Semiconductor device, method for manufacturing the semiconductor device, and display device
06/15/2011CN102097324A Semiconductor component and manufacturing method thereof
06/15/2011CN102097323A Method of forming an insulated gate field effect transistor device having a shield electrode structure
06/15/2011CN102097322A Method of forming an insulated gate field effect transistor device having a shield electrode structure
06/15/2011CN102097321A Method for preparing power NMOS device
06/15/2011CN102097320A NMOS (N-channel Metal Oxide Semiconductor) device and forming method thereof
06/15/2011CN102097319A Method for manufacturing semiconductor device
06/15/2011CN102097318A Method for manufacturing semiconductor device
06/15/2011CN102097317A Method for manufacturing totally packaged switching power supply triode
06/15/2011CN102097316A Method for manufacturing semi-packaged ceramic-insulated switching power supply triode
06/15/2011CN102097315A Method for implementing base region window of silicon germanium heterojunction transistor
06/15/2011CN102097314A Laser heat treatment device and method for accurately controlling cooling process
06/15/2011CN102097313A Manufacturing methods of passivation layer and thin film transistor (TFT) matrix substrate
06/15/2011CN102097312A Process for growing ONO (oxide-nitride-oxide) capacitor structure
06/15/2011CN102097311A Planarization method
06/15/2011CN102097310A Processing method for optical device wafer
06/15/2011CN102097309A Method for preparing ONO layer in EEPROM device preparation
06/15/2011CN102097308A Side wall etching method
06/15/2011CN102097307A Method for forming offset side wall and MOS transistor
06/15/2011CN102097306A Method for producing a semiconductor device using laser annealing for selectively activating implanted dopants
06/15/2011CN102097305A Semiconductor device and its manufacturing method, solid-state imaging device and solid-state imaging apparatus
06/15/2011CN102097304A Forming method of nitrogen-doped silicon carbide thin film
06/15/2011CN102097303A Photolithographic process for thick metal
06/15/2011CN102097302A Film formation method and apparatus
06/15/2011CN102097301A Semiconductor device and method of forming an inductor on polymer matrix composite substrate
06/15/2011CN102097300A Manufacturing method of semiconductor substrate and manufacturing method of semiconductor structure
06/15/2011CN102097299A Saturated doping process of thick polycrystalline resistor
06/15/2011CN102097298A Manufacture of thin SOI devices
06/15/2011CN102097297A Method for depositing high k gate dielectrics on atomic layer on graphene surface by adopting electric field induction
06/15/2011CN102097296A Preparation method of semiconductor nano circular ring
06/15/2011CN102097295A Cleaning method of process chamber
06/15/2011CN102097294A Adhesive tape joining apparatus and adhesive tape joining method
06/15/2011CN102097293A Cleaning machine table for semiconductor package products and cleaning process thereof
06/15/2011CN102097292A Cleaning method for transfer arm, cleaning method for substrate processing apparatus and substrate processing apparatus
06/15/2011CN102097291A Repair and regeneration method and relevant repair and regeneration solution of heavy metal polluted testing reference piece for silicon wafer
06/15/2011CN102097290A System for recycling phosphorous sources in tubular diffusion process