| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 06/23/2011 | US20110147944 Planarising damascene structures |
| 06/23/2011 | US20110147943 Wafer level surface passivation of stackable integrated circuit chips |
| 06/23/2011 | US20110147942 Method of manufacturing semiconductor memory device and semiconductor memory device |
| 06/23/2011 | US20110147941 Semiconductor apparatus and manufacturing method thereof |
| 06/23/2011 | US20110147940 Electroless cu plating for enhanced self-forming barrier layers |
| 06/23/2011 | US20110147938 Conductive via hole and method for forming conductive via hole |
| 06/23/2011 | US20110147937 Method of manufacturing semiconductor device and semiconductor device |
| 06/23/2011 | US20110147935 Method and system for binding halide-based contaminants |
| 06/23/2011 | US20110147933 Multiple surface finishes for microelectronic package substrates |
| 06/23/2011 | US20110147932 Contact-based encapsulation |
| 06/23/2011 | US20110147931 Lead frame land grid array with routing connector trace under unit |
| 06/23/2011 | US20110147930 Semiconductor Component of Semiconductor Chip Size with Flip-Chip-Like External Contacts |
| 06/23/2011 | US20110147929 Through mold via polymer block package |
| 06/23/2011 | US20110147927 Semiconductor device and method for fabricating the same |
| 06/23/2011 | US20110147925 Pre-soldered leadless package |
| 06/23/2011 | US20110147924 Wiring substrate and method of manufacturing the same |
| 06/23/2011 | US20110147923 Surface Mounting Integrated Circuit Components |
| 06/23/2011 | US20110147922 Structures and methods to reduce maximum current density in a solder ball |
| 06/23/2011 | US20110147921 Flange for Semiconductor Die |
| 06/23/2011 | US20110147920 Apparatus and method for embedding components in small-form-factor, system-on-packages |
| 06/23/2011 | US20110147919 Window ball grid array (bga) semiconductor packages |
| 06/23/2011 | US20110147918 Electronic device and method of producing the same |
| 06/23/2011 | US20110147917 Integrated circuit package with embedded components |
| 06/23/2011 | US20110147916 Semiconductor Chip Device with Solder Diffusion Protection |
| 06/23/2011 | US20110147913 Microelectronic package and method for a compression-based mid-level interconnect |
| 06/23/2011 | US20110147912 Methods and apparatuses to stiffen integrated circuit package |
| 06/23/2011 | US20110147911 Stackable circuit structures and methods of fabrication thereof |
| 06/23/2011 | US20110147910 Method for stacking die in thin, small-outline package |
| 06/23/2011 | US20110147909 Semicondcutor chip stack and manufacturing method thereof |
| 06/23/2011 | US20110147908 Module for Use in a Multi Package Assembly and a Method of Making the Module and the Multi Package Assembly |
| 06/23/2011 | US20110147906 Integrated circuit packaging system with embedded interconnect and method of manufacture thereof |
| 06/23/2011 | US20110147905 Semiconductor device and method of manufacturing the same |
| 06/23/2011 | US20110147904 Semiconductor device, electronic apparatus using the semiconductor device, and method of manufacturing the semiconductor device |
| 06/23/2011 | US20110147901 Integrated circuit packaging system with package stacking and method of manufacture thereof |
| 06/23/2011 | US20110147900 Dielectric layer for flash memory device and method for manufacturing thereof |
| 06/23/2011 | US20110147899 Integrated circuit package system employing device stacking |
| 06/23/2011 | US20110147898 Method for dicing a semiconductor wafer, a chip diced from a semiconductor wafer, and an array of chips diced from a semiconductor wafer |
| 06/23/2011 | US20110147897 Offset field grid for efficient wafer layout |
| 06/23/2011 | US20110147896 Cluster jet processing method, semiconductor element, microelectromechanical element, and optical component |
| 06/23/2011 | US20110147895 Apparatus and Method for Controlling Semiconductor Die Warpage |
| 06/23/2011 | US20110147892 Bipolar Transistor with Pseudo Buried Layers |
| 06/23/2011 | US20110147891 Capacitor and a method of manufacturing the same |
| 06/23/2011 | US20110147888 Methods to form memory devices having a capacitor with a recessed electrode |
| 06/23/2011 | US20110147887 Stack capacitor of memory device and fabrication method thereof |
| 06/23/2011 | US20110147884 Contacting and Filling Deep-Trench-Isolation with Tungsten |
| 06/23/2011 | US20110147883 Semiconductor body with a buried material layer and method |
| 06/23/2011 | US20110147882 Semiconductor device and method for fabricating the same |
| 06/23/2011 | US20110147881 Hybrid substrate with improved isolation and simplified method for producing a hybrid substrate |
| 06/23/2011 | US20110147880 Power semiconductor device with new guard ring termination design and method for producing same |
| 06/23/2011 | US20110147867 Method of vertically mounting an integrated circuit |
| 06/23/2011 | US20110147866 Spin-current switched magnetic memory element suitable for circuit integration and method of fabricating the memory element |
| 06/23/2011 | US20110147864 Method for manufacturing a micromechanical diaphragm structure having access from the rear of the substrate |
| 06/23/2011 | US20110147863 Semiconductor device and manufacturing method of the same |
| 06/23/2011 | US20110147861 Mems switch and fabrication method |
| 06/23/2011 | US20110147860 Micromechanical structure comprising a mobile part having stops for out-of-plane displacements of the structure and its production process |
| 06/23/2011 | US20110147859 Semiconductor device and method of manufacturing the same |
| 06/23/2011 | US20110147856 Semiconductor device and method for fabricating the same |
| 06/23/2011 | US20110147855 Dual silicide flow for cmos |
| 06/23/2011 | US20110147854 Indium, carbon and halogen doping for pmos transistors |
| 06/23/2011 | US20110147853 Method of Forming an Electrical Fuse and a Metal Gate Transistor and the Related Electrical Fuse |
| 06/23/2011 | US20110147852 Low noise and high performance lsi device, layout and manufacturing method |
| 06/23/2011 | US20110147851 Method For Depositing Gate Metal For CMOS Devices |
| 06/23/2011 | US20110147850 Carbon and nitrogen doping for selected pmos transistors on an integrated circuit |
| 06/23/2011 | US20110147849 Integrated circuit with electrostatically coupled mos transistors and method for producing such an integrated circuit |
| 06/23/2011 | US20110147848 Multiple transistor fin heights |
| 06/23/2011 | US20110147847 Methods and apparatus to reduce layout based strain variations in non-planar transistor structures |
| 06/23/2011 | US20110147846 Method for incorporating impurity element in epi silicon process |
| 06/23/2011 | US20110147845 Remote Doped High Performance Transistor Having Improved Subthreshold Characteristics |
| 06/23/2011 | US20110147844 Semiconductor device with reduced surface field effect and methods of fabrication the same |
| 06/23/2011 | US20110147843 Semiconductor Component and Method for Producing a Semiconductor Component |
| 06/23/2011 | US20110147842 Multi-gate semiconductor device with self-aligned epitaxial source and drain |
| 06/23/2011 | US20110147840 Wrap-around contacts for finfet and tri-gate devices |
| 06/23/2011 | US20110147839 Semiconductor device and method for manufacturing the same |
| 06/23/2011 | US20110147838 Tunnel Field Effect Transistors |
| 06/23/2011 | US20110147837 Dual work function gate structures |
| 06/23/2011 | US20110147836 Charged balanced devices with shielded gate trench |
| 06/23/2011 | US20110147833 Semiconductor device and method for forming the same |
| 06/23/2011 | US20110147832 Semiconductor device and method for fabricating the same |
| 06/23/2011 | US20110147831 Method for replacement metal gate fill |
| 06/23/2011 | US20110147830 Method of forming a self-aligned charge balanced power dmos |
| 06/23/2011 | US20110147829 Semiconductor device and fabrication method for the same |
| 06/23/2011 | US20110147828 Semiconductor device having doped epitaxial region and its methods of fabrication |
| 06/23/2011 | US20110147826 Methods Of Forming Memory Cells |
| 06/23/2011 | US20110147823 Vertical channel type nonvolatile memory device and method for fabricating the same |
| 06/23/2011 | US20110147822 Semiconductor memory device and method for manufacturing the same |
| 06/23/2011 | US20110147817 Semiconductor component having an oxide layer |
| 06/23/2011 | US20110147816 Spin torque magnetic integrated circuits and devices therefor |
| 06/23/2011 | US20110147815 Semiconductor device and production method thereof |
| 06/23/2011 | US20110147814 Semiconductor device manufacturing method and semiconductor device |
| 06/23/2011 | US20110147813 Semiconductor device and method for fabricating the same |
| 06/23/2011 | US20110147812 Polish to remove topography in sacrificial gate layer prior to gate patterning |
| 06/23/2011 | US20110147811 Two-dimensional condensation for uniaxially strained semiconductor fins |
| 06/23/2011 | US20110147810 Method of fabricating strained structure in semiconductor device |
| 06/23/2011 | US20110147809 Forming a carbon containing layer to facilitate silicide stability in a silicon germanium material |
| 06/23/2011 | US20110147804 Drive current enhancement in tri-gate MOSFETS by introduction of compressive metal gate stress using ion implantation |
| 06/23/2011 | US20110147803 Gas Sensor And Flip-Chip Method For Its Manufacture |
| 06/23/2011 | US20110147802 Sensor |
| 06/23/2011 | US20110147798 Conductivity improvements for iii-v semiconductor devices |
| 06/23/2011 | US20110147797 STRUCTURE OF A pHEMT TRANSISTOR CAPABLE OF NANOSECOND SWITCHING |
| 06/23/2011 | US20110147796 Semiconductor device with metal carrier and manufacturing method |