Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2011
12/29/2011WO2011162018A1 Semiconductor device and method for manufacturing same
12/29/2011WO2011162001A1 Curable composition and method for producing cured film
12/29/2011WO2011161976A1 Silicon carbide substrate manufacturing method and manufacturing device
12/29/2011WO2011161975A1 Epitaxial growth substrate, semiconductor device, and epitaxial growth method
12/29/2011WO2011161965A1 Plasma doping device, plasma doping method, method for manufacturing semiconductor element, and semiconductor element
12/29/2011WO2011161944A1 Process for production of replica mold for imprinting use
12/29/2011WO2011161912A1 Substrate holder, film-forming device, and film-forming method
12/29/2011WO2011161910A1 Light-emitting display device and manufacturing method for same
12/29/2011WO2011161906A1 Method and device for producing silicon carbide semiconductor element
12/29/2011WO2011161901A1 Method for forming polycrystalline silicon thin film, polycrystalline silicon thin film substrate, silicon thin film solar cell, and silicon thin film transistor device
12/29/2011WO2011161888A1 Transfer apparatus and method for manufacturing transfer apparatus
12/29/2011WO2011161875A1 Substrate for display device and process for production thereof, and display device
12/29/2011WO2011161857A1 Display device
12/29/2011WO2011161847A1 Power amplifier
12/29/2011WO2011161797A1 Method for forming wiring structure, method for manufacturing semiconductor device, and substrate processing apparatus
12/29/2011WO2011161795A1 Semiconductor device and method for manufacturing semiconductor device
12/29/2011WO2011161791A1 Semiconductor device
12/29/2011WO2011161771A1 Timing restriction generation support device, timing restriction generation support program, and, method of timing restriction generation support
12/29/2011WO2011161760A1 Substrate placing apparatus provided with alignment function, and film-forming apparatus having the substrate placing apparatus
12/29/2011WO2011161748A1 Semiconductor device and method for manufacturing same
12/29/2011WO2011161721A1 Power semiconductor device
12/29/2011WO2011161715A1 Thin film transistor array device, organic el display device, and method for manufacturing thin film transistor array device
12/29/2011WO2011161714A1 Method for crystallizing silicon thin film and method for manufacturing silicon tft device
12/29/2011WO2011161338A1 Sram memory cell based on transistors of increased effective gate width and production process
12/29/2011WO2011161337A1 Chip elements mounted on wires having an incipient breaking point
12/29/2011WO2011161336A1 Inclusion of chip elements in a sheathed wire
12/29/2011WO2011161318A1 Multi-layer substrate structure and manufacturing method for the same
12/29/2011WO2011161190A1 Substrates for semiconductor devices
12/29/2011WO2011161122A1 Method for transferring a single-crystal silicon thin film
12/29/2011WO2011161016A1 Fet with self-aligned back gate
12/29/2011WO2011160950A1 Method for preparing a substrate by implantation and irradiation
12/29/2011WO2011160922A1 Graphene/nanostructure fet with self-aligned contact and gate
12/29/2011WO2011160591A1 Vdmos device and manufacturing method thereof
12/29/2011WO2011160477A1 Strained-channel field-effect transistor and manufacturing method thereof
12/29/2011WO2011160467A1 Method for maufacturing contact and semiconductor device with contact
12/29/2011WO2011160466A1 Interlayer dielectric layer and manufacturing method thereof, semiconductor device having the interlayer dielectric layer
12/29/2011WO2011160463A1 Semiconductor structure and fabricating method thereof
12/29/2011WO2011160456A1 Semiconductor device and manufacturing method thereof
12/29/2011WO2011160423A1 Method for manufacturing contact of semiconductor device and semiconductor device with contact
12/29/2011WO2011160422A1 Semiconductor device and method for forming the same
12/29/2011WO2011160419A1 Semiconductor structure and manufacturing method thereof
12/29/2011WO2011160338A1 Mos device structure and manufacturing method thereof
12/29/2011WO2011160337A1 Mos devide structure for preventing floating body effect and self-heating effect and manufacturing method thereof
12/29/2011WO2011138524A9 Device and method for inspecting moving semiconductor wafers
12/29/2011WO2011126649A3 Use of laser energy transparent stop layer to achieve minimal debris generation in laser scribing a multilayer patterned workpiece
12/29/2011WO2011126307A3 Pad pattern repair apparatus
12/29/2011WO2011125036A4 P-type oxide alloys based on copper oxides, tin oxides, tin-copper alloy oxides and metal alloy thereof, and nickel oxide, with embedded metals thereof, fabrication process and use thereof
12/29/2011WO2011115773A3 Thin-box metal backgate extremely thin soi device
12/29/2011WO2011114960A9 Film forming method and film forming apparatus
12/29/2011WO2011110419A3 Test device and a test method
12/29/2011WO2011109758A3 Measuring flow properties of multiple gas nozzles of a gas distributor
12/29/2011WO2011109545A3 Systems and methods for wafer edge feature detection and quantification
12/29/2011WO2011109348A3 Wafer carrier with sloped edge
12/29/2011WO2011094641A3 Substrate nest with drip remover
12/29/2011WO2011094568A3 Cleaning agent for semiconductor provided with metal wiring
12/29/2011WO2011094100A3 Adjustable process spacing, centering, and improved gas conductance
12/29/2011WO2011089493A3 Method of removing/preventing redeposition of protein soils
12/29/2011WO2011084975A3 A body-tied asymmetric n-type field effect transistor
12/29/2011WO2011073842A3 High temperature chuck and method of using same
12/29/2011WO2011073841A3 Reinforced pin for being used in a pin chuck, and a pin chuck using such reinforced pin
12/29/2011WO2011019828A3 Masked ion implantation with fast-slow scan
12/29/2011WO2010132319A8 Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization
12/29/2011WO2001039292A3 Fabrication of nanometer size gaps on an electrode
12/29/2011US20110319000 Polishing Pad Sub Plate
12/29/2011US20110318942 MECHANICALLY ROBUST METAL/LOW-k INTERCONNECTS
12/29/2011US20110318941 Composition and Method of Forming an Insulating Layer in a Photovoltaic Device
12/29/2011US20110318940 Method of manufacturing semiconductor device, method of processing substrate, and substrate processing apparatus
12/29/2011US20110318939 High order silane composition and method of manufacturing a film-coated substrate
12/29/2011US20110318938 Temporary bonding adhesive for a semiconductor wafer and method for manufacturing a semiconductor device using the same
12/29/2011US20110318937 Method of manufacturing a semiconductor device, method of cleaning a process vessel, and substrate processing apparatus
12/29/2011US20110318936 Etch process for reducing silicon recess
12/29/2011US20110318935 Method of setting thickness of dielectric and substrate processing apparatus having dielectric disposed in electrode
12/29/2011US20110318934 Substrate processing method and substrate processing apparatus
12/29/2011US20110318933 Substrate processing method
12/29/2011US20110318932 Pyrolysis Methods, Catalysts, and Apparatuses for Treating and/or Detecting Gas Contaminants
12/29/2011US20110318931 Method of Forming a Micro-Pattern for Semiconductor Devices
12/29/2011US20110318930 Methods of manufacturing semiconductor devices
12/29/2011US20110318929 Cmp polishing solution and polishing method
12/29/2011US20110318928 Polymeric Barrier Removal Polishing Slurry
12/29/2011US20110318927 Multiple Patterning Lithography Using Spacer and Self-Aligned Assist Patterns
12/29/2011US20110318926 Wiring structure, semiconductor device and manufacturing method thereof
12/29/2011US20110318925 Substrate processing method and substrate processing apparatus
12/29/2011US20110318924 Method for deposition of at least one electrically conducting film on a substrate
12/29/2011US20110318923 Semiconductor device and method of fabricating the same including a conductive structure is formed through at least one dielectric layer after forming a via structure
12/29/2011US20110318922 Method of forming semiconductor device
12/29/2011US20110318921 Methods Of Forming An Interconnect Between A Substrate Bit Line Contact And A Bit Line In DRAM
12/29/2011US20110318920 Low temperature, long term annealing of nickel contacts to lower interfacial resistance
12/29/2011US20110318919 Surface treatment for a fluorocarbon film
12/29/2011US20110318918 Method of fabricating semiconductor device allowing smooth bump surface
12/29/2011US20110318917 Methods of forming through-silicon via structures including conductive protective layers
12/29/2011US20110318916 Semiconductor device and method for manufacturing the semiconductor device
12/29/2011US20110318915 Process to make high-k transistor dielectrics
12/29/2011US20110318914 Method of fabricating semiconductor device
12/29/2011US20110318913 Semiconductor device and method for fabricating the same
12/29/2011US20110318912 Methods for preparing a semiconductor wafer with high thermal conductivity
12/29/2011US20110318911 Nonvolatile memory cell comprising a reduced height vertical diode
12/29/2011US20110318910 Method of manufacturing a semiconductor device
12/29/2011US20110318909 System and method of semiconductor manufacturing with energy recovery
12/29/2011US20110318908 Manufacturing method of semiconductor device and semiconductor manufacturing apparatus
12/29/2011US20110318907 Composition for forming gate insulating film for thin-film transistor