Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2011
12/29/2011US20110318906 Separation Apparatus, Separation Method, and Method for Manufacturing Semiconductor Element
12/29/2011US20110318905 Silicon/germanium nanoparticle inks, laser pyrolysis reactors for the synthesis of nanoparticles and associated methods
12/29/2011US20110318904 Semiconductor device and manufacturing method
12/29/2011US20110318903 Manufacturing method for fin-fet having floating body
12/29/2011US20110318902 Methods of fabricating flash memory devices having shared sub active regions
12/29/2011US20110318901 Semiconductor device with gate-undercutting recessed region
12/29/2011US20110318900 Semiconductor device and method of manufacturing the same
12/29/2011US20110318899 Methods of Forming Capacitors
12/29/2011US20110318898 Hard mask for thin film resistor manufacture
12/29/2011US20110318897 Method of Forming a Shallow Trench Isolation Embedded Polysilicon Resistor
12/29/2011US20110318896 Method for manufacturing semiconductor device
12/29/2011US20110318895 Fabrication method of trenched power mosfet
12/29/2011US20110318894 Method for manufacturing semiconductor device
12/29/2011US20110318893 Methods for forming semiconductor device structures
12/29/2011US20110318892 Semiconductor device and method for manufacturing the same
12/29/2011US20110318891 Method of crystallizing silicon thin film and method of manufacturing silicon thin-film transistor device
12/29/2011US20110318890 Methods of forming semiconductor-on-insulating (soi) field effect transistors with body contacts
12/29/2011US20110318889 Method for manufacturing semiconductor device
12/29/2011US20110318888 Method for manufacturing semiconductor device
12/29/2011US20110318887 Method of molding semiconductor package
12/29/2011US20110318886 Method for forming circuit patterns on surface of substrate
12/29/2011US20110318885 Thermally and Electrically Enhanced Ball Grid Array Package
12/29/2011US20110318884 Production method of semiconductor module with resin-molded assembly of heat spreader and semiconductor chip
12/29/2011US20110318883 Power semiconductor component and method for the production thereof
12/29/2011US20110318882 Method of restricting chip movement upon bonding to rigid substrate using spray coatable adhesive
12/29/2011US20110318881 Semiconductor substrate and method for manufacturing semiconductor device
12/29/2011US20110318880 Contact spring application to semiconductor devices
12/29/2011US20110318879 Method for producing semiconductor chip with adhesive film, adhesive film for semiconductor used in the method, and method for producing semiconductor device
12/29/2011US20110318878 Manufacturing method of semiconductor packages
12/29/2011US20110318877 Dicing methods
12/29/2011US20110318876 Semiconductor package, electrical and electronic apparatus including the semiconductor package, and method of manufacturing the semiconductor package
12/29/2011US20110318875 Semiconductor device and method for manufacturing the same
12/29/2011US20110318863 Photovoltaic device manufacture
12/29/2011US20110318861 Planar cavity mems and related structures, methods of manufacture and design structures
12/29/2011US20110318856 Method for fabricating thin film transistor array substrate
12/29/2011US20110318854 Method of mounting mems integrated circuits directly from wafer film frame
12/29/2011US20110318853 Method for forming nozzle chamber of inkjet printhead
12/29/2011US20110318852 Wafer level integration module having controlled resistivity interconnects
12/29/2011US20110318851 Manufacturing method and test method of semiconductor device
12/29/2011US20110318850 Microelectronic package and method of manufacturing same
12/29/2011US20110318849 Method of manufacturing a semiconductor device
12/29/2011US20110318848 FERROMAGNETIC PREFERRED GRAIN GROWTH PROMOTION SEED LAYER FOR AMORPHOUS OR MICROCRYSTALLINE MgO TUNNEL BARRIER
12/29/2011US20110318143 Vacuum processing apparatus
12/29/2011US20110318142 Minimum contact area wafer clamping with gas flow for rapid wafer cooling
12/29/2011US20110318141 Substrate transfer equipment and high speed substrate processing system using the same
12/29/2011US20110317775 Modified preamble structure for ieee 802.11a extensions to allow for coexistence and interoperability between 802.11a devices and higher data rate, mimo or otherwise extended devices
12/29/2011US20110317735 Semiconductor laser module and manufacturing method therefor
12/29/2011US20110317509 Memory device word line drivers and methods
12/29/2011US20110317485 Structure and method for sram cell circuit
12/29/2011US20110317480 Phase change memory coding
12/29/2011US20110317471 Nonvolatile stacked nand memory
12/29/2011US20110317469 Non-volatile sampler
12/29/2011US20110317467 Semiconductor device and method of manufacturing the same
12/29/2011US20110317466 High read speed memory with gate isolation
12/29/2011US20110317388 Electronic device having a wiring substrate
12/29/2011US20110317387 Integrated Voltage Regulator with Embedded Passive Device(s) for a Stacked IC
12/29/2011US20110317385 Wafer level package (wlp) device having bump assemblies including a barrier metal
12/29/2011US20110317371 Electronic component package and fabrication method thereof
12/29/2011US20110317143 Lithographic apparatus and device manufacturing method
12/29/2011US20110317108 Semiconductor Device and Manufacturing Method Thereof
12/29/2011US20110317050 Method of manufacturing semiconductor device, semiconductor device, and camera module
12/29/2011US20110316565 Schottky junction si nanowire field-effect bio-sensor/molecule detector
12/29/2011US20110316201 Wafer Level Packaging Using Blade Molding
12/29/2011US20110316173 Electronic device comprising a nanotube-based interface connection layer, and manufacturing method thereof
12/29/2011US20110316172 Semiconductor package and manufacturing method thereof
12/29/2011US20110316171 Semiconductor Device and Method of Forming Interconnect Structure for Encapsulated Die Having Pre-Applied Protective Layer
12/29/2011US20110316170 Wiring Substrate, Semiconductor Device, and Method for Manufacturing Wiring Substrate
12/29/2011US20110316169 Wiring substrate and method for manufacturing the wiring substrate
12/29/2011US20110316168 Semiconductor Device and Method of Fabricating the Same
12/29/2011US20110316167 Electrical interconnect for an integrated circuit package and method of making same
12/29/2011US20110316166 Integrated circuit system with via and method of manufacture thereof
12/29/2011US20110316165 Semiconductor Device and Method of Fabricating the Same
12/29/2011US20110316164 Corrugated die edge for stacked die semiconductor package
12/29/2011US20110316163 Integrated circuit packaging system with molded interconnects and method of manufacture thereof
12/29/2011US20110316162 Integrated circuit packaging system with trenches and method of manufacture thereof
12/29/2011US20110316161 Method of producing a dual damascene multilayer interconnection and multilayer interconnection structure
12/29/2011US20110316158 Method and system for thin multi chip stack package with film on wire and copper wire
12/29/2011US20110316156 Semiconductor Device and Method of Forming RDL Along Sloped Side Surface of Semiconductor Die for Z-Direction Interconnect
12/29/2011US20110316155 Semiconductor packaging system with multipart conductive pillars and method of manufacture thereof
12/29/2011US20110316154 Semiconductor device having semiconductor substrate, and method of manufacturing the same
12/29/2011US20110316152 Manufacturing method of semiconductor packages and a semiconductor package
12/29/2011US20110316151 Semiconductor package and method for manufacturing semiconductor package
12/29/2011US20110316150 Semiconductor package and method for manufacturing semiconductor package
12/29/2011US20110316149 Method of mounting electronic component and mounting substrate
12/29/2011US20110316146 Semiconductor Device and Method of Forming Anisotropic Conductive Film Between Semiconductor Die and Build-Up Interconnect Structure
12/29/2011US20110316145 Nano/micro-structure and fabrication method thereof
12/29/2011US20110316143 Semiconductor module with cooling mechanism and production method thereof
12/29/2011US20110316141 Layered chip package and method of manufacturing same
12/29/2011US20110316140 Microelectronic package and method of manufacturing same
12/29/2011US20110316139 Package for a wireless enabled integrated circuit
12/29/2011US20110316135 Semiconductor device and method of manufacturing the same
12/29/2011US20110316134 Semiconductor storage device and manufacturing method thereof
12/29/2011US20110316133 Integrated circuit package system with package stand-off and method of manufacture thereof
12/29/2011US20110316132 Semiconductor Device and Method of Forming Vertically Offset Bond on Trace Interconnect Structure on Leadframe
12/29/2011US20110316130 Thin semiconductor package and method for manufacturing same
12/29/2011US20110316126 Semiconductor element and method of manufacturing the semiconductor element
12/29/2011US20110316124 Semiconductor device
12/29/2011US20110316123 Laminated semiconductor substrate, laminated chip package and method of manufacturing the same
12/29/2011US20110316122 Wafer laser-marking method and die fabricated using the same
12/29/2011US20110316121 Method for manufacturing trench type superjunction device and trench type superjunction device