Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
11/2000
11/14/2000US6147896 Nonvolatile ferroelectric memory using selective reference cell
11/14/2000US6147884 Method and apparatus for low-power charge transition in an I/O system of an integrated circuit
11/14/2000US6147544 Data transfer circuit transferring complementary data signals
11/14/2000US6147527 Internal clock generator
11/14/2000US6147514 Sense amplifier circuit
11/14/2000US6147512 Input buffer circuit
11/09/2000WO2000067261A1 Multi-format personal digital audio player
11/09/2000WO2000067259A1 Universal player for compressed audio
11/09/2000DE19934501C1 Synchronous integrated memory e.g. dynamic random-access memory
11/08/2000EP1050822A2 Method for accessing a memory device
11/08/2000EP1050820A2 A semiconductor memory device with a large storage capacity memory and a fast speed memory
11/08/2000CN1272673A Production of improved oblique pointer
11/08/2000CN1272672A Recording method management method and recording equipment
11/07/2000USH1915 Hybrid static RAM circuit
11/07/2000US6145060 Data storage device with only internal addressing
11/07/2000US6145023 Information storage and information processing system utilizing state-designating member provided on supporting card surface which produces write-permitting or write-inhibiting signal
11/07/2000US6144713 Delay locked loop circuit for controlling delay time with reduced lock-up time
11/07/2000US6144617 Synchronous semiconductor storage device
11/07/2000US6144616 Semiconductor memory device
11/07/2000US6144615 Synchronous dynamic random access memory
11/07/2000US6144614 Semiconductor integrated circuit having a clock and latch circuits for performing synchronous switching operations
11/07/2000US6144613 Synchronous semiconductor memory
11/07/2000US6144611 Method for clearing memory contents and memory array capable of performing the same
11/07/2000US6144608 Dual-port memory
11/07/2000US6144604 Simultaneous addressing using single-port RAMs
11/07/2000US6144603 Semiconductor memory device
11/07/2000US6144602 Semiconductor memory device
11/07/2000US6144601 Semiconductor memory having an improved reading circuit
11/07/2000US6144600 Semiconductor memory device having first and second pre-charging circuits
11/07/2000US6144599 Semiconductor memory device
11/07/2000US6144598 Method and apparatus for efficiently testing rambus memory devices
11/07/2000US6144596 Semiconductor memory test apparatus
11/07/2000US6144594 Test mode activation and data override
11/07/2000US6144590 Semiconductor memory having differential bit lines
11/07/2000US6144587 Semiconductor memory device
11/07/2000US6144583 Semiconductor integrated circuit device
11/07/2000US6144239 Semiconductor integrated circuit with phase adjusting function and system using the same
11/07/2000US6144231 High speed dynamic latch comparator
11/07/2000US6144230 Sense amplifier driving device
11/07/2000CA2177307C High-speed data register for laser range finders
11/02/2000WO2000065598A1 Integrated circuit
11/02/2000WO2000065587A1 Solid state audio player in a compact cassette case
11/02/2000EP1049100A1 Semiconductor device with selectionable pads
11/02/2000EP1049099A2 Electrical apparatus, especially a mobile apparatus
11/02/2000EP1048109A1 Current control technique
11/02/2000EP0809884B1 Sense amplifier with pull-up circuit for accelerated latching of logic level output data
11/01/2000CN1271944A Integrated memory arranged with reading amplifier on opposite sides of cell area
11/01/2000CN1271943A Improved readout amplifier
10/2000
10/31/2000US6141727 Device and method for controlling data storage device
10/31/2000US6141292 Clock generating circuits that utilize analog pump signals to provide fast synchronization and reduced delay skew
10/31/2000US6141291 Semiconductor memory device
10/31/2000US6141288 Semiconductor memory device allowing change of refresh mode and address switching method therewith
10/31/2000US6141286 Embedded DRAM architecture with local data drivers and programmable number of data read and data write lines
10/31/2000US6141283 Method and apparatus for dynamically placing portions of a memory in a reduced power consumption state
10/31/2000US6141282 Circuit for designating an operating mode of a semiconductor memory device
10/31/2000US6141279 Refresh control circuit
10/31/2000US6141277 Semiconductor memory preventing sense amplifier malfunctions due to effects of noise generated in output buffer
10/31/2000US6141276 Apparatus and method for increasing test flexibility of a memory device
10/31/2000US6141275 Method of and apparatus for precharging and equalizing local input/output signal lines within a memory circuit
10/31/2000US6141274 Semiconductor integrated circuit having a pre-charged operation and a data latch function
10/31/2000US6141273 Circuit for setting width of input/output data in semiconductor memory device
10/31/2000US6141272 Method and apparatus for programmable control signal generation for a semiconductor device
10/31/2000US6141270 Method for cell margin testing a dynamic cell plate sensing memory architecture
10/31/2000US6141269 Semiconductor integrated circuit device using BiCMOS technology
10/31/2000US6141266 Method and apparatus for generating a signal with a voltage insensitive or controlled delay
10/31/2000US6141265 Clock synchronous memory
10/31/2000US6141264 Floating isolation gate for DRAM sensing
10/31/2000US6141263 Circuit and method for a high data transfer rate output driver
10/31/2000US6141259 Dynamic random access memory having reduced array voltage
10/31/2000US6141258 Programmable impedance output buffer drivers, semiconductor devices and static random access memories provided with a progammable impedance output port
10/31/2000US6141257 Device for the configuration of options in an integrated circuit and implementation method
10/31/2000US6141249 Organization of blocks within a nonvolatile memory unit to effectively decrease sector write operation time
10/31/2000US6141241 Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
10/31/2000US6140855 Dynamic-latch-receiver with self-reset pointer
10/31/2000US6140844 Amplifier
10/31/2000US6140704 Integrated circuit memory devices with improved twisted bit-line structures
10/25/2000EP1047079A2 Semiconductor memory device generating accurate internal reference voltage
10/25/2000EP1047077A1 Nonvolatile memory device with double hierarchical decoding
10/25/2000EP1046980A2 Portable electronic device having a log-structured file system in flash memory
10/24/2000US6138214 Synchronous dynamic random access memory architecture for sequential burst mode
10/24/2000US6138205 Burst mode type semiconductor memory device
10/24/2000US6138204 Multi bus access memory
10/24/2000US6137744 Memory device with reduced power consumption
10/24/2000US6137743 Semiconductor memory device with reduced consumption of standby current in refresh mode
10/24/2000US6137741 Sense amplifier with cascode output
10/24/2000US6137740 Semiconductor memory device configured with I/O separation
10/24/2000US6137739 Multilevel sensing circuit and method thereof
10/24/2000US6137737 Method and circuit for rapidly equilibrating paired digit lines of a memory device during testing
10/24/2000US6137730 Buffered bit-line for faster sensing and higher data rate in memory devices
10/24/2000US6137327 Delay lock loop
10/24/2000US6137325 Device and methods in a delay locked loop for generating quadrature and other off-phase clocks with improved resolution
10/24/2000US6137320 Input receiver circuit
10/24/2000US6137319 Reference-free single ended clocked sense amplifier circuit
10/19/2000WO2000062301A1 Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
10/19/2000WO2000062300A1 Disposable sound recording and reproduction device
10/19/2000CA2332867A1 Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
10/18/2000EP1045396A1 Semiconductor memory device
10/18/2000EP0870303B1 High performance universal multi-port internally cached dynamic random access memory system, architecture and method
10/18/2000CN1270713A Master-salve delay locked loop for accurate delay of non-periodic signals
10/18/2000CN1270695A Apparatus and method for simplified analog signal record and playback
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