| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 03/28/2000 | US6044034 Multiport memory having plurality of groups of bit lines |
| 03/28/2000 | US6044032 Addressing scheme for a double data rate SDRAM |
| 03/28/2000 | US6044031 Programmable bit line drive modes for memory arrays |
| 03/28/2000 | US6044030 FIFO unit with single pointer |
| 03/28/2000 | US6044029 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array |
| 03/28/2000 | US6044028 Semiconductor storage device and electronic equipment using the same |
| 03/28/2000 | US6044027 Circuit and method for providing a substantially constant time delay over a range of supply voltages |
| 03/28/2000 | US6044026 Trap and delay pulse generator for a high speed clock |
| 03/28/2000 | US6044024 Interactive method for self-adjusted access on embedded DRAM memory macros |
| 03/28/2000 | US6044023 Method and apparatus for pipelining data in an integrated circuit |
| 03/28/2000 | US6044013 Nonvolatile semiconductor memory device |
| 03/28/2000 | US6044004 Memory integrated circuit for storing digital and analog data and method |
| 03/28/2000 | US6043694 Lock arrangement for a calibrated DLL in DDR SDRAM applications |
| 03/28/2000 | US6043685 Circuit for controlling sense amplifier over-driving voltage |
| 03/28/2000 | US6043684 Method and apparatus for reducing skew between input signals and clock signals within an integrated circuit |
| 03/28/2000 | US6043679 Level shifter |
| 03/28/2000 | US6043562 Digit line architecture for dynamic memory |
| 03/28/2000 | US6041726 Oil tanker hull assembly and method of operation |
| 03/23/2000 | WO2000016260A1 Data processor and data sequence conversion method |
| 03/23/2000 | DE19944727A1 Memory device with internal clock generating circuit |
| 03/23/2000 | DE19941196A1 Two-channel first-in first-out (FIFO) memory with synchronized read-out and write address indicators |
| 03/23/2000 | DE19900802C1 Integrated ferroelectric memory |
| 03/23/2000 | DE19842852A1 Integrierter Speicher Built-in Memory |
| 03/23/2000 | DE19842818A1 Synchronous circuit e.g. synchronous integrated memory such as SDRAM, RDRAM |
| 03/22/2000 | EP0987713A1 Memory circuit architecture |
| 03/22/2000 | EP0986775A2 Optical logic element and methods for respectively its preparation and optical addressing, as well as the use thereof in an optical logic device |
| 03/21/2000 | USRE36621 Semiconductor memory device |
| 03/21/2000 | US6041419 Programmable delay timing calibrator for high speed data interface |
| 03/21/2000 | US6041388 Circuit and method for controlling memory depth |
| 03/21/2000 | US6041015 Semiconductor type memory device having consecutive access to arbitrary memory address |
| 03/21/2000 | US6041014 Nonvolatile semiconductor memory device having row decoder |
| 03/21/2000 | US6041004 Semiconductor device with high speed write capabilities |
| 03/21/2000 | US6041000 Initialization for fuse control |
| 03/21/2000 | US6040999 Semiconductor memory device |
| 03/21/2000 | US6040883 Programmable hologram generator |
| 03/21/2000 | CA2176982C Data protocol for a music chip |
| 03/16/2000 | DE19841446A1 Electronic signal line potential control circuit esp for synchronous DRAMs |
| 03/15/2000 | EP0986005A1 FIFO memory device and method for controlling same |
| 03/14/2000 | US6038648 Semiconductor memory device having the same access timing over clock cycles |
| 03/14/2000 | US6038617 Auto configuration of a serial ROM by sensing an output of the serial ROM after transmission of a read instruction and an x-bit address to it's input |
| 03/14/2000 | US6038199 Portable digital audio recorder with adaptive control configurations |
| 03/14/2000 | US6038196 Semiconductor memory device having a synchronous DRAM |
| 03/14/2000 | US6038195 Synchronous memory device having a delay time register and method of operating same |
| 03/14/2000 | US6038194 Memory decoder with zero static power |
| 03/14/2000 | US6038193 Single ended read scheme with segmented bitline of multi-port register file |
| 03/14/2000 | US6038192 Memory cells for field programmable memory array |
| 03/14/2000 | US6038191 Circuit for reducing stand-by current induced by defects in memory array |
| 03/14/2000 | US6038188 Data transmission circuit, data line driving circuit, amplifying circuit, semiconductor intergrated circuit, and semiconductor memory |
| 03/14/2000 | US6038185 Method and apparatus for a serial access memory |
| 03/14/2000 | US6038184 Semiconductor memory device having internal timing generator shared between data read/write and burst access |
| 03/14/2000 | US6038182 Integrated circuit memory devices and testing methods including selectable input/output channels |
| 03/14/2000 | US6038180 Semiconductor memory capable of detecting memory cells with small margins as well as sense amplifier |
| 03/14/2000 | US6038177 Data pipeline interrupt scheme for preventing data disturbances |
| 03/14/2000 | US6038176 Presettable semiconductor memory device |
| 03/14/2000 | US6038173 Memory read circuit with dynamically controlled precharging device |
| 03/14/2000 | US6038170 Semiconductor integrated circuit device including a plurality of divided sub-bit lines |
| 03/14/2000 | US6038158 Semiconductor memory |
| 03/14/2000 | US6037890 Ultra high speed, low power, flash A/D converter utilizing a current mode regenerative comparator |
| 03/14/2000 | US6037808 Differential SOI amplifiers having tied floating body connections |
| 03/14/2000 | US6037807 Synchronous sense amplifier with temperature and voltage compensated translator |
| 03/14/2000 | US6036101 Electronic labeling systems and methods and electronic card systems and methods |
| 03/09/2000 | WO2000013184A1 Block write circuit and method for wide data path memory devices |
| 03/09/2000 | WO2000013094A1 Fifo using asynchronous logic |
| 03/09/2000 | CA2341981A1 Fifo using asynchronous logic |
| 03/09/2000 | CA2245363A1 Bhram memory |
| 03/08/2000 | EP0984455A1 Recording and reproducing apparatus |
| 03/08/2000 | CN1246710A Integrated circuit device with sychronous signal generator |
| 03/08/2000 | CN1246707A Recording and reproducing device |
| 03/08/2000 | CN1050212C First-in first-out buffer memory |
| 03/07/2000 | US6035382 Circuit for receiving a command word for accessing a secure subkey |
| 03/07/2000 | US6035369 Method and apparatus for providing a memory with write enable information |
| 03/07/2000 | US6035365 Dual clocked synchronous memory device having a delay time register and method of operating same |
| 03/07/2000 | US6034920 Semiconductor memory device having a back gate voltage controlled delay circuit |
| 03/07/2000 | US6034919 Method and apparatus for using extended-data output memory devices in a system designed for fast page mode memory devices |
| 03/07/2000 | US6034918 Method of operating a memory having a variable data output length and a programmable register |
| 03/07/2000 | US6034917 Control circuit for terminating a memory access cycle in a memory block of an electronic storage device |
| 03/07/2000 | US6034916 Data masking circuits and methods for integrated circuit memory devices, including data strobe signal synchronization |
| 03/07/2000 | US6034915 Memory with variable write driver operation |
| 03/07/2000 | US6034911 Semiconductor memory device for a rapid random access |
| 03/07/2000 | US6034910 Semiconductor memory device to which serial access is made and a method for accessing the same |
| 03/07/2000 | US6034909 Method and apparatus for bit line isolation for random access memory devices |
| 03/07/2000 | US6034908 Sense amplifying methods and sense amplification integrated devices |
| 03/07/2000 | US6034902 Solid-state memory device |
| 03/07/2000 | US6034901 Clock control circuit |
| 03/07/2000 | US6034900 Memory device having a relatively wide data bus |
| 03/07/2000 | US6034898 Dynamic random access memory for increasing a data output driver current |
| 03/07/2000 | US6034883 Solid state director for beams |
| 03/07/2000 | US6033945 Multiple equilibration circuits for a single bit line |
| 03/02/2000 | WO2000011678A1 Memory supervision |
| 03/02/2000 | WO2000011676A1 An embedded dram architecture with local data drivers and programmable number of data read and data write lines |
| 03/02/2000 | WO2000011675A1 Method and apparatus to control the temperature of a component |
| 03/02/2000 | DE19940231A1 Bootstrapped CMOS driver for driving large capacitive load; has drive unit. with pull-up and pull-down devices and bootstrap unit for amplifying pull-up and pull-down devices' gate voltages |
| 03/02/2000 | DE19929600A1 Asynchronous differential logic circuit (ASDL) using charge recycling technique for semiconductor circuit design |
| 03/02/2000 | DE19919578A1 Synchronous semiconducting memory has control circuit that can exert control according to external control signal so only data corresponding to address can be read out of/written into memory cell |
| 03/02/2000 | DE19909671A1 Halbleiterspeicherbauelement The semiconductor memory device |
| 03/02/2000 | DE19839121A1 Continuous and interruption free reading and processing system for data in data acquisition system with pair of dynamic data buffers |
| 03/02/2000 | DE19839105A1 Integrated semiconductor memory storage device with control for clocked write/read |
| 03/01/2000 | EP0982735A2 Method and apparatus for bit line recovery in dynamic random access memory |
| 03/01/2000 | EP0982734A1 A solid-state audio recording unit |
| 03/01/2000 | EP0982733A2 An output buffer |