| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 07/25/2000 | US6094090 Differential amplifier circuit, CMOS inverter, demodulator circuit for pulse-width modulation, and sampling circuit |
| 07/25/2000 | US6094080 Internal clock signal generator for synchronous memory device |
| 07/25/2000 | US6094075 Current control technique |
| 07/21/2000 | CA2296211A1 Read-only sequence controller having a gate array composition |
| 07/20/2000 | WO2000042613A1 Magnetic random access memory |
| 07/20/2000 | WO2000042612A1 Integrated memory |
| 07/20/2000 | WO2000042514A1 Circuit for powering down unused configuration bits to minimize power consumption |
| 07/20/2000 | DE19962509A1 Bit line read-out amplifier in semiconductor memory and its driving method, preventing energy consumption during read-out and preloading |
| 07/19/2000 | EP1020868A1 Semiconductor integrated circuit device |
| 07/19/2000 | EP1020867A1 Method for refreshing a dynamic memory |
| 07/19/2000 | EP1020864A1 High capacity dimm memory with data and state memory |
| 07/19/2000 | EP1020790A1 High speed memory-based buffer and system and method for use thereof |
| 07/19/2000 | EP1019912A2 Apparatus and method for pipelined memory operations |
| 07/19/2000 | EP1019911A1 Apparatus and method for device timing compensation |
| 07/18/2000 | US6092082 Digital audio recorder and player with address backup function |
| 07/18/2000 | US6091667 Semiconductor memory device and a data reading method and a data writing method therefor |
| 07/18/2000 | US6091665 Synchronous random access memory having column factor counter for both serial and interleave counting |
| 07/18/2000 | US6091663 Synchronous burst semiconductor memory device with parallel input/output data strobe clocks |
| 07/18/2000 | US6091662 Semiconductor synchronous pipeline memory having data amplifiers selectively supplied with data signals |
| 07/18/2000 | US6091661 Data access device for DRAM |
| 07/18/2000 | US6091659 Synchronous semiconductor memory device with multi-bank configuration |
| 07/18/2000 | US6091656 Semiconductor integrated circuit device having a hierarchical power source configuration |
| 07/18/2000 | US6091655 Semiconductor memory |
| 07/18/2000 | US6091654 Circuit and method for low voltage, current sense amplifier |
| 07/18/2000 | US6091653 Method of sensing data in semiconductor memory device |
| 07/18/2000 | US6091650 Redundancy for low remanence memory cells |
| 07/18/2000 | US6091648 Voltage generating circuit for semiconductor integrated circuit device |
| 07/18/2000 | US6091646 Method and apparatus for coupling data from a memory device using a single ended read data path |
| 07/18/2000 | US6091645 Programmable read ports and write ports for I/O buses in a field programmable memory array |
| 07/18/2000 | US6091640 Semiconductor integrated circuit with multiple write operation modes |
| 07/18/2000 | US6091633 Memory array architecture utilizing global bit lines shared by multiple cells |
| 07/18/2000 | US6091629 High speed semiconductor memory apparatus including circuitry to increase writing and reading speed |
| 07/18/2000 | US6091429 Video/graphics memory system |
| 07/13/2000 | WO2000041130A1 Mobile data carrier |
| 07/12/2000 | EP1018745A1 Improved driver circuit |
| 07/12/2000 | EP0904589A4 Floating gate memory device with low current page buffer |
| 07/12/2000 | CN1259742A Improved driving device circuit |
| 07/11/2000 | US6088776 Burst clock memory circuit |
| 07/11/2000 | US6088774 Read/write timing for maximum utilization of bidirectional read/write bus |
| 07/11/2000 | US6088760 Addressing system in a multi-port RAM having main and cache memories |
| 07/11/2000 | US6088743 Processor receiving response request corresponding to access clock signal with buffer for external transfer synchronous to response request and internal transfer synchronous to operational clock |
| 07/11/2000 | US6088293 Low-power column decode circuit |
| 07/11/2000 | US6088292 Semiconductor memory device having a plurality of banks activated by a common timing control circuit |
| 07/11/2000 | US6088291 Semiconductor memory device |
| 07/11/2000 | US6088290 Semiconductor memory device having a power-down mode |
| 07/11/2000 | US6088288 Memory device and method of reducing ground bounce in a memory device |
| 07/11/2000 | US6088285 Semiconductor memory circuit in which pattern widths of switching circuit and buffers are formed within a pattern width of a column unit |
| 07/11/2000 | US6088284 Memory chip having multiple input/output system |
| 07/11/2000 | US6088280 High-speed memory arranged for operating synchronously with a microprocessor |
| 07/11/2000 | US6088279 Semiconductor memory device with dummy word line |
| 07/11/2000 | US6088278 Latching sense amplifier structure with pre-amplifier |
| 07/11/2000 | US6088277 Read only memory capable of realizing a high-speed read operation |
| 07/11/2000 | US6088276 Semiconductor device provided with a circuit performing fast data reading with a low power consumption |
| 07/11/2000 | US6088275 Semiconductor memory device operating at a low level power supply voltage |
| 07/11/2000 | US6088273 Method and circuit for measuring the read operation delay on DRAM bit lines |
| 07/11/2000 | US6088272 Data output system |
| 07/11/2000 | US6088271 Method and apparatus for transferring signal to circuit without waveform distortion |
| 07/11/2000 | US6088270 Sense amplifier with local write drivers |
| 07/11/2000 | US6088267 Nonvolatile semiconductor memory device having row decoder |
| 07/11/2000 | US6088255 Semiconductor device with prompt timing stabilization |
| 07/11/2000 | US6088254 Uniform mesh clock distribution system |
| 07/11/2000 | US6088253 Semiconductor memory device and method for forming same |
| 07/11/2000 | US6087896 Compensation technique using MOS capacitance |
| 07/11/2000 | US6087887 Signal routing circuits having selective high impedance and low impedance output states |
| 07/11/2000 | US6087868 Digital delay locked loop |
| 07/11/2000 | US6087859 Current mirror type sense amplifier circuit for semiconductor memory device |
| 07/11/2000 | US6087858 Self-timed sense amplifier evaluation scheme |
| 07/06/2000 | WO2000039802A1 A memory decoder with zero static power |
| 07/06/2000 | DE19963497A1 Double data rate (DDR) synchronous dynamic random access assembly (SDRAM) for carrying out data read-out operations |
| 07/05/2000 | EP1017059A1 Method for reading a memory, particularly a non-volatile memory |
| 07/05/2000 | EP1016511A1 Molded body of thermoplastic resin having sound absorption characteristics |
| 07/05/2000 | EP1016086A1 Method and apparatus for adjusting the timing of signals over fine and coarse ranges |
| 07/05/2000 | CN1054228C Semiconductor memory device with reduced data bus line load |
| 07/04/2000 | US6085300 DRAM system with simultaneous burst read and write |
| 07/04/2000 | US6085285 Intermixing different devices along a single data communication link by placing a strobe signal in a parity bit slot |
| 07/04/2000 | US6085284 Method of operating a memory device having a variable data output length and an identification register |
| 07/04/2000 | US6085283 Data selecting memory device and selected data transfer device |
| 07/04/2000 | US6085280 Parallel-access memory and method |
| 07/04/2000 | US6084829 Information apparatus capable of selectively recording audio signal |
| 07/04/2000 | US6084823 Synchronous semiconductor memory device and bus control method |
| 07/04/2000 | US6084822 Semiconductor synchronous memory device responsive to external masking signal for forcing data port to enter into high-impedance state and method for controlling the same |
| 07/04/2000 | US6084817 Semiconductor memory with transfer buffer structure |
| 07/04/2000 | US6084816 Semiconductor memory device |
| 07/04/2000 | US6084814 Antifuse detection circuit |
| 07/04/2000 | US6084812 Device and method for varying bit line precharge voltage in semiconductor memory |
| 07/04/2000 | US6084811 Phased sense amplifiers |
| 07/04/2000 | US6084810 Dynamic logic circuit with bitline repeater circuit |
| 07/04/2000 | US6084809 Main amplifier circuit and input-output bus for a dynamic random access memory |
| 07/04/2000 | US6084805 Synchronous memory with programmable read latency |
| 07/04/2000 | US6084802 Semiconductor integrated circuit device |
| 07/04/2000 | US6084800 Circuit of boosting a voltage for use in a flash memory device |
| 07/04/2000 | US6084438 Data determination circuit |
| 06/29/2000 | WO2000038190A1 Current sense amplifier |
| 06/29/2000 | WO2000038045A1 Fifo unit with single pointer |
| 06/29/2000 | WO2000002127A3 Data storage device |
| 06/29/2000 | DE19962510A1 Vorrichtung zum Erzeugen eines internen Befehlsignals und Verfahren hierfür A device for generating an internal command signal and method thereof |
| 06/29/2000 | DE19951677A1 Semiconducting memory device reads data signal held in write buffer as data signal requested by read command if write command and read command address signals coincide |
| 06/28/2000 | EP1014381A1 Semiconductor memory device and storage method thereof |
| 06/28/2000 | EP1014378A1 High speed output enable path and method for an integrated circuit device |
| 06/28/2000 | EP1014377A1 Current sensing differential amplifier with high rejection of power supply variations and method for an integrated circuit memory device |