| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 06/28/2000 | EP1012845A1 Method and apparatus for local control signal generation in a memory device |
| 06/28/2000 | EP1012693A4 Signal processing system and method with rom storing instructions encoded for reducing power consumption during reads |
| 06/28/2000 | EP1012693A1 Signal processing system and method with rom storing instructions encoded for reducing power consumption during reads |
| 06/28/2000 | CN1258079A Semiconductor memory device |
| 06/27/2000 | US6081480 Semiconductor integrated circuit |
| 06/27/2000 | US6081479 Hierarchical prefetch for semiconductor memories |
| 06/27/2000 | US6081477 Write scheme for a double data rate SDRAM |
| 06/27/2000 | US6081476 Clock-synchronized read-only memory |
| 06/27/2000 | US6081475 Write control apparatus for memory devices |
| 06/27/2000 | US6081469 Combined precharging and homogenizing circuit |
| 06/27/2000 | US6081468 Semiconductor device |
| 06/27/2000 | US6081464 Circuit for SRAM test mode isolated bitline modulation |
| 06/27/2000 | US6081463 Semiconductor memory remapping |
| 06/27/2000 | US6081462 Adjustable delay circuit for setting the speed grade of a semiconductor device |
| 06/27/2000 | US6081461 Circuit and method for a memory device with p-channel isolation gates |
| 06/27/2000 | US6081460 Integrated circuit devices having voltage level responsive mode-selection circuits therein and methods of operating same |
| 06/27/2000 | US6081458 Memory system having a unidirectional bus and method for communicating therewith |
| 06/27/2000 | US6081456 Bit line control circuit for a memory array using 2-bit non-volatile memory cells |
| 06/27/2000 | US6081142 Hold time margin increased semiconductor device and access time adjusting method for same |
| 06/27/2000 | US6081138 High-speed sense amplifier |
| 06/27/2000 | US6079622 Non-contact information storage medium and data transmission method for the medium |
| 06/22/2000 | WO2000036512A1 Clock phase adjustment method, and integrated circuit and design method therefor |
| 06/21/2000 | EP1010179A1 Two step memory device command buffer apparatus and method and memory devices and computer systems using same |
| 06/21/2000 | EP1010038A1 Optical logic element and optical logic device |
| 06/21/2000 | DE19958268A1 Semiconductor memory device has control circuit for selective activation of different resetting circuits connected across databus pair before and after write operation |
| 06/21/2000 | DE19928271A1 Local clock signal generation circuit for semiconductor memory element uses phase mixers receiving signals from different points along internal clock signal line for providing respective local clock signals |
| 06/21/2000 | CN1257285A Memory data bus structure and method for structuring multi-width chaacter memory |
| 06/21/2000 | CN1257270A Digital audio frequency recording and reproducing device |
| 06/20/2000 | US6078986 Processor system using synchronous dynamic memory |
| 06/20/2000 | US6078978 Bus interface circuit in a semiconductor memory device |
| 06/20/2000 | US6078972 Control system of FIFO memories |
| 06/20/2000 | US6078636 Counter circuit and semiconductor memory having counter circuit as address counter circuit |
| 06/20/2000 | US6078546 Synchronous semiconductor memory device with double data rate scheme |
| 06/20/2000 | US6078539 Method and device for initiating a memory array during power up |
| 06/20/2000 | US6078533 Adjustable delay circuit for setting the speed grade of a semiconductor device |
| 06/20/2000 | US6078532 Method and apparatus for improving performance of DRAM subsystems with SRAM overlays |
| 06/20/2000 | US6078530 Reference voltage generator for a ferroelectric material memory device |
| 06/20/2000 | US6078529 Data storing device |
| 06/20/2000 | US6078528 Delay control circuit using dynamic latches |
| 06/20/2000 | US6078527 Pipelined dual port integrated circuit memory |
| 06/20/2000 | US6078523 Gain modulated sense amplifier and method of operating the same |
| 06/20/2000 | US6078518 Apparatus and method for reading state of multistate non-volatile memory cells |
| 06/20/2000 | US6078515 Memory system with multiple addressing and control busses |
| 06/20/2000 | US6078514 Semiconductor device and semiconductor system for high-speed data transfer |
| 06/20/2000 | US6078193 Apparatus and method for providing a static mode for dynamic logic circuits |
| 06/14/2000 | EP1008992A1 Semiconductor storage device |
| 06/14/2000 | EP0627116B1 Optical memory |
| 06/14/2000 | CN2383185Y Semiconductor digit sound effect recording and replaying device |
| 06/14/2000 | CN1256784A Memory device and method |
| 06/14/2000 | CN1256494A Recording and reproducing device |
| 06/13/2000 | US6076063 Audio player and recorder employing semiconductor memory as a recording medium |
| 06/13/2000 | US6075749 Semiconductor memory device |
| 06/13/2000 | US6075748 Address counter cell |
| 06/13/2000 | US6075745 Field programmable memory array |
| 06/13/2000 | US6075743 Method and apparatus for sharing sense amplifiers between memory banks |
| 06/13/2000 | US6075740 Method and apparatus for increasing the time available for refresh for 1-t SRAM compatible devices |
| 06/13/2000 | US6075739 Semiconductor storage device performing self-refresh operation in an optimal cycle |
| 06/13/2000 | US6075737 Row decoded biasing of sense amplifier for improved one's margin |
| 06/13/2000 | US6075736 Semiconductor memory device with improved sense amplifier driver |
| 06/13/2000 | US6075735 Semiconductor memory device having reversing logic means |
| 06/13/2000 | US6075733 Technique for reducing peak current in memory operation |
| 06/13/2000 | US6075732 Semiconductor memory device with redundancy circuit |
| 06/13/2000 | US6075730 High performance cost optimized memory with delayed memory writes |
| 06/13/2000 | US6075729 High-speed static random access memory |
| 06/13/2000 | US6075728 Semiconductor memory device accessible at high speed |
| 06/13/2000 | US6075393 Clock synchronous semiconductor device system and semiconductor devices used with the same |
| 06/08/2000 | WO2000033314A1 Integrated electric and/or electronic system with means for insulating a functional module, corresponding device and method for insulation and use |
| 06/07/2000 | EP1006457A2 Method and system for storing data objects using a small object data stream |
| 06/07/2000 | EP1006456A2 Method and system for storing and accessing data in a compound document using object linking |
| 06/07/2000 | EP0890172B1 Solid-state memory device |
| 06/07/2000 | CN1256005A Encoding method and memory device |
| 06/07/2000 | CN1255996A Storage appts. and writing and/or reading methods for use in hierarchical coding |
| 06/07/2000 | CN1053285C Synchronous semiconductor memory device with write latency control function |
| 06/06/2000 | US6073223 Memory controller and method for intermittently activating and idling a clock signal for a synchronous memory |
| 06/06/2000 | US6073219 Semiconductor memory device with high speed read-modify-write function |
| 06/06/2000 | US6072749 Memory device preventing a slow operation through a mask signal |
| 06/06/2000 | US6072747 High-speed current setting systems and methods for integrated circuit output drivers |
| 06/06/2000 | US6072745 Method for operating a memory |
| 06/06/2000 | US6072744 Memory device having data bus lines of uniform length |
| 06/06/2000 | US6072743 High speed operable semiconductor memory device with memory blocks arranged about the center |
| 06/06/2000 | US6072740 Apparatus for reducing the effects of power supply distribution related noise |
| 06/06/2000 | US6072739 Semiconductor memory device capable of attaining higher speed data reading and writing operations by making equalization operation suitable for single data line |
| 06/06/2000 | US6072738 Cycle time reduction using an early precharge |
| 06/06/2000 | US6072735 Built-in redundancy architecture for computer memories |
| 06/06/2000 | US6072733 Programmable sense amplifier delay (PSAD) circuit which is matched to the memory array |
| 06/06/2000 | US6072732 Self-timed write reset pulse generation |
| 06/06/2000 | US6072731 Semiconductor memory circuit |
| 06/06/2000 | US6072730 Low power differential signal transition techniques for use in memory devices |
| 06/06/2000 | US6072729 Data-output driver circuit and method |
| 06/06/2000 | US6072728 Data output buffer |
| 06/06/2000 | US6072712 Compact optical random access memory having a refractive-reflector lens |
| 06/06/2000 | US6072645 Method and apparatus for retroactive recording using memory of past information in a data storage buffer |
| 06/02/2000 | WO2000031745A1 Ampic dram |
| 06/02/2000 | WO2000031744A1 Copy management for data systems |
| 06/02/2000 | WO2000031729A2 A digital memory structure and device, and methods for the management thereof |
| 06/02/2000 | WO2000031726A1 Digital dictation card and method of use in business |
| 06/02/2000 | CA2352342A1 A digital memory structure and device, and methods for the management thereof |
| 06/02/2000 | CA2351656A1 Ampic dram |
| 05/31/2000 | EP1005165A2 Delay lock loop circuit |
| 05/31/2000 | EP1005046A2 Semiconductor memory device |